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1; During lowering of HVX instruction for 64B vector, the rotation2; direction for VROR (as part of concat of vectors lowering) is fixed.3 4; RUN: llc -mtriple=hexagon -O2 %s -o - | FileCheck %s5 6; CHECK: vec.epilog.ph7; CHECK: r{{.*}} = {{.*}}#488; CHECK: vec.epilog.vector.body9 10 11%struct.str = type { i8, i8, i8 }12 13define dso_local void @foo(i16* nocapture noundef writeonly %pOut, i16* nocapture noundef readonly %Coefs, %struct.str* nocapture noundef readonly %pQ, i32 noundef %Intra) local_unnamed_addr #0 {14entry:15 %Coefs13 = ptrtoint i16* %Coefs to i3216 %pOut12 = ptrtoint i16* %pOut to i3217 %cmp10 = icmp slt i32 %Intra, 1618 br i1 %cmp10, label %iter.check, label %for.end19 20iter.check: ; preds = %entry21 %Q = getelementptr inbounds %struct.str, %struct.str* %pQ, i32 0, i32 022 %0 = load i8, i8* %Q, align 123 %conv3 = zext i8 %0 to i3224 %1 = sub nsw i32 0, %conv325 %2 = sub i32 16, %Intra26 %min.iters.check = icmp ult i32 %2, 827 br i1 %min.iters.check, label %for.body.preheader, label %vector.memcheck28 29vector.memcheck: ; preds = %iter.check30 %3 = shl i32 %Intra, 131 %4 = add i32 %3, %pOut1232 %5 = add i32 %3, %Coefs1333 %6 = sub i32 %4, %534 %diff.check = icmp ult i32 %6, 12835 br i1 %diff.check, label %for.body.preheader, label %vector.main.loop.iter.check36 37vector.main.loop.iter.check: ; preds = %vector.memcheck38 %min.iters.check14 = icmp ult i32 %2, 6439 br i1 %min.iters.check14, label %vec.epilog.ph, label %vector.ph40 41vector.ph: ; preds = %vector.main.loop.iter.check42 %n.vec = and i32 %2, -6443 %bd.spinsert = insertelement <32 x i32> poison, i32 %1, i64 044 %bd.sp = shufflevector <32 x i32> %bd.spinsert, <32 x i32> poison, <32 x i32> zeroinitializer45 %bd.spinsert16 = insertelement <32 x i32> poison, i32 %conv3, i64 046 %bd.sp17 = shufflevector <32 x i32> %bd.spinsert16, <32 x i32> poison, <32 x i32> zeroinitializer47 br label %vector.body48 49vector.body: ; preds = %vector.body, %vector.ph50 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]51 %offset.idx = add i32 %index, %Intra52 %7 = getelementptr inbounds i16, i16* %Coefs, i32 %offset.idx53 %8 = bitcast i16* %7 to <32 x i16>*54 %wide.load = load <32 x i16>, <32 x i16>* %8, align 255 %9 = getelementptr inbounds i16, i16* %7, i32 3256 %10 = bitcast i16* %9 to <32 x i16>*57 %wide.load15 = load <32 x i16>, <32 x i16>* %10, align 258 %11 = icmp slt <32 x i16> %wide.load, zeroinitializer59 %12 = icmp slt <32 x i16> %wide.load15, zeroinitializer60 %13 = select <32 x i1> %11, <32 x i32> %bd.sp, <32 x i32> %bd.sp1761 %14 = select <32 x i1> %12, <32 x i32> %bd.sp, <32 x i32> %bd.sp1762 %15 = trunc <32 x i32> %13 to <32 x i16>63 %16 = trunc <32 x i32> %14 to <32 x i16>64 %17 = getelementptr inbounds i16, i16* %pOut, i32 %offset.idx65 %18 = bitcast i16* %17 to <32 x i16>*66 store <32 x i16> %15, <32 x i16>* %18, align 267 %19 = getelementptr inbounds i16, i16* %17, i32 3268 %20 = bitcast i16* %19 to <32 x i16>*69 store <32 x i16> %16, <32 x i16>* %20, align 270 %index.next = add nuw i32 %index, 6471 %21 = icmp eq i32 %index.next, %n.vec72 br i1 %21, label %middle.block, label %vector.body73 74middle.block: ; preds = %vector.body75 %cmp.n = icmp eq i32 %2, %n.vec76 br i1 %cmp.n, label %for.end, label %vec.epilog.iter.check77 78vec.epilog.iter.check: ; preds = %middle.block79 %ind.end24 = add i32 %n.vec, %Intra80 %n.vec.remaining = and i32 %2, 5681 %min.epilog.iters.check = icmp eq i32 %n.vec.remaining, 082 br i1 %min.epilog.iters.check, label %for.body.preheader, label %vec.epilog.ph83 84vec.epilog.ph: ; preds = %vector.main.loop.iter.check, %vec.epilog.iter.check85 %vec.epilog.resume.val = phi i32 [ %n.vec, %vec.epilog.iter.check ], [ 0, %vector.main.loop.iter.check ]86 %n.vec23 = and i32 %2, -887 %ind.end = add i32 %n.vec23, %Intra88 %bd.spinsert29 = insertelement <8 x i32> poison, i32 %1, i64 089 %bd.sp30 = shufflevector <8 x i32> %bd.spinsert29, <8 x i32> poison, <8 x i32> zeroinitializer90 %bd.spinsert31 = insertelement <8 x i32> poison, i32 %conv3, i64 091 %bd.sp32 = shufflevector <8 x i32> %bd.spinsert31, <8 x i32> poison, <8 x i32> zeroinitializer92 br label %vec.epilog.vector.body93 94vec.epilog.vector.body: ; preds = %vec.epilog.vector.body, %vec.epilog.ph95 %index26 = phi i32 [ %vec.epilog.resume.val, %vec.epilog.ph ], [ %index.next33, %vec.epilog.vector.body ]96 %offset.idx27 = add i32 %index26, %Intra97 %22 = getelementptr inbounds i16, i16* %Coefs, i32 %offset.idx2798 %23 = bitcast i16* %22 to <8 x i16>*99 %wide.load28 = load <8 x i16>, <8 x i16>* %23, align 2100 %24 = icmp slt <8 x i16> %wide.load28, zeroinitializer101 %25 = select <8 x i1> %24, <8 x i32> %bd.sp30, <8 x i32> %bd.sp32102 %26 = trunc <8 x i32> %25 to <8 x i16>103 %27 = getelementptr inbounds i16, i16* %pOut, i32 %offset.idx27104 %28 = bitcast i16* %27 to <8 x i16>*105 store <8 x i16> %26, <8 x i16>* %28, align 2106 %index.next33 = add nuw i32 %index26, 8107 %29 = icmp eq i32 %index.next33, %n.vec23108 br i1 %29, label %vec.epilog.middle.block, label %vec.epilog.vector.body109 110vec.epilog.middle.block: ; preds = %vec.epilog.vector.body111 %cmp.n25 = icmp eq i32 %2, %n.vec23112 br i1 %cmp.n25, label %for.end, label %for.body.preheader113 114for.body.preheader: ; preds = %vector.memcheck, %iter.check, %vec.epilog.iter.check, %vec.epilog.middle.block115 %i.011.ph = phi i32 [ %Intra, %iter.check ], [ %Intra, %vector.memcheck ], [ %ind.end24, %vec.epilog.iter.check ], [ %ind.end, %vec.epilog.middle.block ]116 br label %for.body117 118for.body: ; preds = %for.body.preheader, %for.body119 %i.011 = phi i32 [ %inc, %for.body ], [ %i.011.ph, %for.body.preheader ]120 %arrayidx = getelementptr inbounds i16, i16* %Coefs, i32 %i.011121 %30 = load i16, i16* %arrayidx, align 2122 %cmp1 = icmp slt i16 %30, 0123 %31 = select i1 %cmp1, i32 %1, i32 %conv3124 %conv4 = trunc i32 %31 to i16125 %arrayidx5 = getelementptr inbounds i16, i16* %pOut, i32 %i.011126 store i16 %conv4, i16* %arrayidx5, align 2127 %inc = add i32 %i.011, 1128 %exitcond.not = icmp eq i32 %inc, 16129 br i1 %exitcond.not, label %for.end, label %for.body130 131for.end: ; preds = %for.body, %middle.block, %vec.epilog.middle.block, %entry132 ret void133}134 135attributes #0 = { argmemonly nofree norecurse nosync nounwind "target-cpu"="hexagonv66" "target-features"="+hvx-length64b,+hvxv66,+v66" }136