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1; RUN: opt -march=hexagon -hexagon-loop-idiom -S < %s | FileCheck %s2; RUN: opt -mtriple=hexagon-- -p hexagon-loop-idiom -disable-memcpy-idiom -S < %s | FileCheck %s3 4; Make sure we don't convert load/store loops into memcpy if the access type5; is a vector. Using vector instructions is generally better in such cases.6 7; CHECK-NOT: @llvm.memcpy8 9%s.0 = type { i32 }10 11define void @f0(ptr noalias %a0, ptr noalias %a1) #0 align 2 {12b0:13 br i1 undef, label %b1, label %b214 15b1: ; preds = %b1, %b016 %v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ]17 %v1 = mul nuw nsw i32 %v0, 6418 %v2 = getelementptr %s.0, ptr %a0, i32 %v119 %v3 = getelementptr %s.0, ptr %a1, i32 %v120 %v5 = load <64 x i32>, ptr %v2, align 25621 store <64 x i32> %v5, ptr %v3, align 25622 %v7 = add nuw nsw i32 %v0, 123 br i1 undef, label %b1, label %b224 25b2: ; preds = %b1, %b026 ret void27}28 29attributes #0 = { "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }30