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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=hexagon < %s | FileCheck %s3target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"4target triple = "hexagon"5 6@g0 = external dso_local global <64 x i32>, align 1287@g1 = external hidden unnamed_addr constant [110 x i8], align 18@g2 = external hidden unnamed_addr constant [102 x i8], align 19@g3 = external hidden unnamed_addr constant [110 x i8], align 110 11declare dso_local void @f0() #012 13declare dso_local void @f1(ptr, ...) #014 15; Function Attrs: nounwind readnone16declare <32 x i32> @llvm.hexagon.V6.vandqrt.128B(<128 x i1>, i32) #117 18; Function Attrs: nounwind readnone19declare <128 x i1> @llvm.hexagon.V6.vandvrt.128B(<32 x i32>, i32) #120 21; Function Attrs: nounwind readnone22declare <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32) #123 24; Function Attrs: nounwind readnone25declare <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32>, i32, i32 immarg) #126 27; Function Attrs: nounwind readnone28declare <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32>, <32 x i32>) #129 30define dso_local void @f2() #0 {31; CHECK-LABEL: f2:32; CHECK:       // %bb.0: // %b033; CHECK-NEXT:    {34; CHECK-NEXT:     r1:0 = combine(#2,##16843009)35; CHECK-NEXT:     allocframe(r29,#1152):raw36; CHECK-NEXT:    }37; CHECK-NEXT:    {38; CHECK-NEXT:     v1 = vsplat(r1)39; CHECK-NEXT:     r17:16 = combine(#-1,#1)40; CHECK-NEXT:     r29 = and(r29,#-128)41; CHECK-NEXT:     memd(r30+#-8) = r17:1642; CHECK-NEXT:    } // 8-byte Folded Spill43; CHECK-NEXT:    {44; CHECK-NEXT:     v0 = vsplat(r16)45; CHECK-NEXT:     vmem(r29+#2) = v0.new46; CHECK-NEXT:    } // 128-byte Folded Spill47; CHECK-NEXT:    {48; CHECK-NEXT:     q0 = vand(v0,r0)49; CHECK-NEXT:     r18 = ##-214748364850; CHECK-NEXT:     memd(r30+#-16) = r19:1851; CHECK-NEXT:    } // 8-byte Folded Spill52; CHECK-NEXT:    {53; CHECK-NEXT:     r0 = ##g154; CHECK-NEXT:     memd(r30+#-24) = r21:2055; CHECK-NEXT:    } // 8-byte Folded Spill56; CHECK-NEXT:    {57; CHECK-NEXT:     v0 = vand(q0,r17)58; CHECK-NEXT:     r19 = ##g0+12859; CHECK-NEXT:     vmem(r29+#1) = v0.new60; CHECK-NEXT:    }61; CHECK-NEXT:    {62; CHECK-NEXT:     r20 = ##g063; CHECK-NEXT:     vmem(r29+#3) = v164; CHECK-NEXT:    } // 128-byte Folded Spill65; CHECK-NEXT:    {66; CHECK-NEXT:     v3:2.h = vadd(v0.ub,v1.ub)67; CHECK-NEXT:     vmem(r29+#4) = v2.new68; CHECK-NEXT:    } // 256-byte Folded Spill69; CHECK-NEXT:    {70; CHECK-NEXT:     v31:30.uw = vrmpy(v3:2.ub,r18.ub,#0)71; CHECK-NEXT:     vmem(r29+#5) = v372; CHECK-NEXT:    } // 256-byte Folded Spill73; CHECK-NEXT:    {74; CHECK-NEXT:     vmem(r19+#0) = v3175; CHECK-NEXT:    }76; CHECK-NEXT:    {77; CHECK-NEXT:     call f178; CHECK-NEXT:     vmem(r20+#0) = v3079; CHECK-NEXT:    }80; CHECK-NEXT:    {81; CHECK-NEXT:     v0 = vmem(r29+#2)82; CHECK-NEXT:    } // 128-byte Folded Reload83; CHECK-NEXT:    {84; CHECK-NEXT:     v1:0.h = vadd(v0.ub,v0.ub)85; CHECK-NEXT:     r0 = ##g286; CHECK-NEXT:     vmem(r29+#6) = v0.new87; CHECK-NEXT:    } // 256-byte Folded Spill88; CHECK-NEXT:    {89; CHECK-NEXT:     vmem(r29+#7) = v190; CHECK-NEXT:    } // 256-byte Folded Spill91; CHECK-NEXT:    {92; CHECK-NEXT:     v1:0.uw = vrmpy(v1:0.ub,r17.ub,#0)93; CHECK-NEXT:     vmem(r19+#0) = v1.new94; CHECK-NEXT:    }95; CHECK-NEXT:    {96; CHECK-NEXT:     call f197; CHECK-NEXT:     vmem(r20+#0) = v098; CHECK-NEXT:    }99; CHECK-NEXT:    {100; CHECK-NEXT:     r0 = ##2147483647101; CHECK-NEXT:     v0 = vmem(r29+#6)102; CHECK-NEXT:    } // 256-byte Folded Reload103; CHECK-NEXT:    {104; CHECK-NEXT:     v1 = vmem(r29+#7)105; CHECK-NEXT:    } // 256-byte Folded Reload106; CHECK-NEXT:    {107; CHECK-NEXT:     v1:0.uw = vrmpy(v1:0.ub,r0.ub,#1)108; CHECK-NEXT:     r0 = ##g3109; CHECK-NEXT:     vmem(r19+#0) = v1.new110; CHECK-NEXT:    }111; CHECK-NEXT:    {112; CHECK-NEXT:     call f1113; CHECK-NEXT:     vmem(r20+#0) = v0114; CHECK-NEXT:    }115; CHECK-NEXT:    {116; CHECK-NEXT:     v0 = vmem(r29+#4)117; CHECK-NEXT:    } // 256-byte Folded Reload118; CHECK-NEXT:    {119; CHECK-NEXT:     v1 = vmem(r29+#5)120; CHECK-NEXT:    } // 256-byte Folded Reload121; CHECK-NEXT:    {122; CHECK-NEXT:     v1:0.uw = vrmpy(v1:0.ub,r18.ub,#1)123; CHECK-NEXT:     vmem(r19+#0) = v1.new124; CHECK-NEXT:    }125; CHECK-NEXT:    {126; CHECK-NEXT:     call f0127; CHECK-NEXT:     vmem(r20+#0) = v0128; CHECK-NEXT:    }129; CHECK-NEXT:    {130; CHECK-NEXT:     r0 = #0131; CHECK-NEXT:     v0 = vmem(r29+#4)132; CHECK-NEXT:    } // 256-byte Folded Reload133; CHECK-NEXT:    {134; CHECK-NEXT:     v1 = vmem(r29+#5)135; CHECK-NEXT:    } // 256-byte Folded Reload136; CHECK-NEXT:    {137; CHECK-NEXT:     v1:0.uw = vrmpy(v1:0.ub,r0.ub,#1)138; CHECK-NEXT:     vmem(r19+#0) = v1.new139; CHECK-NEXT:    }140; CHECK-NEXT:    {141; CHECK-NEXT:     call f0142; CHECK-NEXT:     vmem(r20+#0) = v0143; CHECK-NEXT:    }144; CHECK-NEXT:    {145; CHECK-NEXT:     v0 = vmem(r29+#2)146; CHECK-NEXT:    } // 128-byte Folded Reload147; CHECK-NEXT:    {148; CHECK-NEXT:     v1 = vmem(r29+#3)149; CHECK-NEXT:    } // 128-byte Folded Reload150; CHECK-NEXT:    {151; CHECK-NEXT:     v1:0.h = vadd(v0.ub,v1.ub)152; CHECK-NEXT:    }153; CHECK-NEXT:    {154; CHECK-NEXT:     v1:0.uw = vrmpy(v1:0.ub,r16.ub,#1)155; CHECK-NEXT:     r17:16 = memd(r30+#-8)156; CHECK-NEXT:     vmem(r19+#0) = v1.new157; CHECK-NEXT:    } // 8-byte Folded Reload158; CHECK-NEXT:    {159; CHECK-NEXT:     r19:18 = memd(r30+#-16)160; CHECK-NEXT:     vmem(r20+#0) = v0161; CHECK-NEXT:    } // 8-byte Folded Reload162; CHECK-NEXT:    {163; CHECK-NEXT:     r21:20 = memd(r30+#-24)164; CHECK-NEXT:     r31:30 = dealloc_return(r30):raw165; CHECK-NEXT:    } // 8-byte Folded Reload166b0:167  %v0 = alloca <32 x i32>, align 128168  %v1 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1)169  %v2 = call <128 x i1> @llvm.hexagon.V6.vandvrt.128B(<32 x i32> %v1, i32 16843009)170  %v3 = call <32 x i32> @llvm.hexagon.V6.vandqrt.128B(<128 x i1> %v2, i32 -1)171  store <32 x i32> %v3, ptr %v0, align 128172  %v4 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 2)173  %v5 = call <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32> undef, <32 x i32> %v4)174  %v6 = call <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32> %v5, i32 -2147483648, i32 0)175  store <64 x i32> %v6, ptr @g0, align 128176  call void (ptr, ...) @f1(ptr @g1) #2177  %v7 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1)178  %v8 = call <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32> %v7, <32 x i32> undef)179  %v9 = call <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32> %v8, i32 -1, i32 0)180  store <64 x i32> %v9, ptr @g0, align 128181  call void (ptr, ...) @f1(ptr @g2) #2182  %v10 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1)183  %v11 = call <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32> %v10, <32 x i32> undef)184  %v12 = call <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32> %v11, i32 2147483647, i32 1)185  store <64 x i32> %v12, ptr @g0, align 128186  call void (ptr, ...) @f1(ptr @g3) #3187  %v13 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 2)188  %v14 = call <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32> undef, <32 x i32> %v13)189  %v15 = call <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32> %v14, i32 -2147483648, i32 1)190  store <64 x i32> %v15, ptr @g0, align 128191  call void @f0() #2192  %v16 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 2)193  %v17 = call <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32> undef, <32 x i32> %v16)194  %v18 = call <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32> %v17, i32 0, i32 1)195  store <64 x i32> %v18, ptr @g0, align 128196  call void @f0() #3197  %v19 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1)198  %v20 = call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 2)199  %v21 = call <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32> %v19, <32 x i32> %v20)200  %v22 = call <64 x i32> @llvm.hexagon.V6.vrmpyubi.128B(<64 x i32> %v21, i32 1, i32 1)201  store <64 x i32> %v22, ptr @g0, align 128202  ret void203}204 205attributes #0 = { nounwind "use-soft-float"="false" "target-cpu"="hexagonv66" "target-features"="+hvxv66,+hvx-length128b" }206attributes #1 = { nounwind readnone }207attributes #2 = { nounwind optsize }208attributes #3 = { nounwind minsize }209