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1# RUN: llc --mtriple=hexagon -run-pass=hwloops %s -o - | FileCheck %s2 3# CHECK-LABEL: name: f4# CHECK: [[R1:%[0-9]+]]:predregs = C2_cmpgti [[R0:%[0-9]+]], 05# CHECK: [[R3:%[0-9]+]]:intregs = C2_muxir [[R1:%[0-9]+]], [[R2:%[0-9]+]], 16# CHECK-LABEL: name: g7# CHECK: [[R1:%[0-9]+]]:predregs = C2_cmpgti [[R0:%[0-9]+]], 08# CHECK: [[R3:%[0-9]+]]:intregs = C2_muxir [[R1:%[0-9]+]], [[R2:%[0-9]+]], 19--- |10 @a = dso_local global [255 x ptr] zeroinitializer, align 811 12 ; Function Attrs: minsize nofree norecurse nosync nounwind optsize memory(write, argmem: none, inaccessiblemem: none)13 define dso_local void @f(i32 noundef %m) local_unnamed_addr #0 {14 entry:15 %cond = tail call i32 @llvm.smax.i32(i32 %m, i32 2)16 %0 = add nsw i32 %cond, -417 %1 = shl i32 %cond, 318 %cgep = getelementptr i8, ptr @a, i32 %119 %cgep36 = bitcast ptr @a to ptr20 br label %do.body21 22 do.body: ; preds = %do.body, %entry23 %lsr.iv1 = phi ptr [ %cgep4, %do.body ], [ %cgep, %entry ]24 %lsr.iv = phi i32 [ %lsr.iv.next, %do.body ], [ %0, %entry ]25 %sh.0 = phi i32 [ 256, %entry ], [ %shr, %do.body ]26 %shr = lshr i32 %sh.0, 127 %cgep5 = getelementptr inbounds [255 x ptr], ptr %cgep36, i32 0, i32 %shr28 store ptr %lsr.iv1, ptr %cgep5, align 4, !tbaa !529 %lsr.iv.next = add nsw i32 %lsr.iv, 430 %cmp1 = icmp samesign ult i32 %lsr.iv.next, 107374183631 %cgep4 = getelementptr i8, ptr %lsr.iv1, i32 3232 br i1 %cmp1, label %do.body, label %do.end, !llvm.loop !933 34 do.end: ; preds = %do.body35 ret void36 }37 38 ; Function Attrs: minsize nofree norecurse nosync nounwind optsize memory(write, argmem: none, inaccessiblemem: none)39 define dso_local void @g(i32 noundef %m) local_unnamed_addr #0 {40 entry:41 %0 = add i32 %m, -442 %1 = shl i32 %m, 343 %cgep = getelementptr i8, ptr @a, i32 %144 %cgep36 = bitcast ptr @a to ptr45 br label %do.body46 47 do.body: ; preds = %do.body, %entry48 %lsr.iv1 = phi ptr [ %cgep4, %do.body ], [ %cgep, %entry ]49 %lsr.iv = phi i32 [ %lsr.iv.next, %do.body ], [ %0, %entry ]50 %sh.0 = phi i32 [ 256, %entry ], [ %shr, %do.body ]51 %shr = lshr i32 %sh.0, 152 %cgep5 = getelementptr inbounds [255 x ptr], ptr %cgep36, i32 0, i32 %shr53 store ptr %lsr.iv1, ptr %cgep5, align 4, !tbaa !554 %lsr.iv.next = add i32 %lsr.iv, 455 %cmp = icmp slt i32 %lsr.iv.next, 107374183656 %cgep4 = getelementptr i8, ptr %lsr.iv1, i32 3257 br i1 %cmp, label %do.body, label %do.end, !llvm.loop !1158 59 do.end: ; preds = %do.body60 ret void61 }62 63 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)64 declare i32 @llvm.smax.i32(i32, i32) #165 66 !llvm.module.flags = !{!0, !1, !2, !3}67 !0 = !{i32 1, !"wchar_size", i32 4}68 !1 = !{i32 8, !"PIC Level", i32 2}69 !2 = !{i32 7, !"PIE Level", i32 2}70 !3 = !{i32 7, !"frame-pointer", i32 2}71 !5 = !{!6, !6, i64 0}72 !6 = !{!"any pointer", !7, i64 0}73 !7 = !{!"omnipotent char", !8, i64 0}74 !8 = !{!"Simple C/C++ TBAA"}75 !9 = distinct !{!9, !10}76 !10 = !{!"llvm.loop.mustprogress"}77 !11 = distinct !{!11, !10}78 79...80---81name: f82alignment: 483exposesReturnsTwice: false84legalized: false85regBankSelected: false86selected: false87failedISel: false88tracksRegLiveness: true89hasWinCFI: false90noPhis: false91isSSA: true92noVRegs: false93hasFakeUses: false94callsEHReturn: false95callsUnwindInit: false96hasEHScopes: false97hasEHFunclets: false98isOutlined: false99debugInstrRef: false100failsVerification: false101tracksDebugUserValues: false102registers:103 - { id: 0, class: intregs, preferred-register: '', flags: [ ] }104 - { id: 1, class: intregs, preferred-register: '', flags: [ ] }105 - { id: 2, class: intregs, preferred-register: '', flags: [ ] }106 - { id: 3, class: intregs, preferred-register: '', flags: [ ] }107 - { id: 4, class: intregs, preferred-register: '', flags: [ ] }108 - { id: 5, class: intregs, preferred-register: '', flags: [ ] }109 - { id: 6, class: intregs, preferred-register: '', flags: [ ] }110 - { id: 7, class: intregs, preferred-register: '', flags: [ ] }111 - { id: 8, class: intregs, preferred-register: '', flags: [ ] }112 - { id: 9, class: intregs, preferred-register: '', flags: [ ] }113 - { id: 10, class: intregs, preferred-register: '', flags: [ ] }114 - { id: 11, class: intregs, preferred-register: '', flags: [ ] }115 - { id: 12, class: intregs, preferred-register: '', flags: [ ] }116 - { id: 13, class: predregs, preferred-register: '', flags: [ ] }117 - { id: 14, class: predregs, preferred-register: '', flags: [ ] }118 - { id: 15, class: intregs, preferred-register: '', flags: [ ] }119liveins:120 - { reg: '$r0', virtual-reg: '%9' }121frameInfo:122 isFrameAddressTaken: false123 isReturnAddressTaken: false124 hasStackMap: false125 hasPatchPoint: false126 stackSize: 0127 offsetAdjustment: 0128 maxAlignment: 1129 adjustsStack: false130 hasCalls: false131 stackProtector: ''132 functionContext: ''133 maxCallFrameSize: 4294967295134 cvBytesOfCalleeSavedRegisters: 0135 hasOpaqueSPAdjustment: false136 hasVAStart: false137 hasMustTailInVarArgFunc: false138 hasTailCall: false139 isCalleeSavedInfoValid: false140 localFrameSize: 0141 savePoint: []142 restorePoint: []143fixedStack: []144stack: []145entry_values: []146callSites: []147debugValueSubstitutions: []148constants: []149machineFunctionInfo: {}150body: |151 bb.0.entry:152 successors: %bb.1(0x80000000)153 liveins: $r0154 155 %9:intregs = COPY $r0156 %11:intregs = A2_tfrsi 2157 %12:intregs = A2_max %9, %11158 %0:intregs = nsw A2_addi %12, -4159 %1:intregs = S4_addi_asl_ri @a, %12, 3160 %2:intregs = A2_tfrsi @a161 %10:intregs = A2_tfrsi 256162 163 bb.1.do.body:164 successors: %bb.1(0x7c000000), %bb.2(0x04000000)165 166 %3:intregs = PHI %1, %bb.0, %8, %bb.1167 %4:intregs = PHI %0, %bb.0, %7, %bb.1168 %5:intregs = PHI %10, %bb.0, %15, %bb.1169 %15:intregs = S2_extractu %5, 8, 1170 S4_storeri_rr %2, %15, 2, %3 :: (store (s32) into %ir.cgep5, !tbaa !5)171 %7:intregs = nsw A2_addi %4, 4172 %13:predregs = C2_cmpgtui %7, 1073741835173 %8:intregs = A2_addi %3, 32174 J2_jumpf %13, %bb.1, implicit-def dead $pc175 J2_jump %bb.2, implicit-def dead $pc176 177 bb.2.do.end:178 PS_jmpret $r31, implicit-def dead $pc179 180...181---182name: g183alignment: 4184exposesReturnsTwice: false185legalized: false186regBankSelected: false187selected: false188failedISel: false189tracksRegLiveness: true190hasWinCFI: false191noPhis: false192isSSA: true193noVRegs: false194hasFakeUses: false195callsEHReturn: false196callsUnwindInit: false197hasEHScopes: false198hasEHFunclets: false199isOutlined: false200debugInstrRef: false201failsVerification: false202tracksDebugUserValues: false203registers:204 - { id: 0, class: intregs, preferred-register: '', flags: [ ] }205 - { id: 1, class: intregs, preferred-register: '', flags: [ ] }206 - { id: 2, class: intregs, preferred-register: '', flags: [ ] }207 - { id: 3, class: intregs, preferred-register: '', flags: [ ] }208 - { id: 4, class: intregs, preferred-register: '', flags: [ ] }209 - { id: 5, class: intregs, preferred-register: '', flags: [ ] }210 - { id: 6, class: intregs, preferred-register: '', flags: [ ] }211 - { id: 7, class: intregs, preferred-register: '', flags: [ ] }212 - { id: 8, class: intregs, preferred-register: '', flags: [ ] }213 - { id: 9, class: intregs, preferred-register: '', flags: [ ] }214 - { id: 10, class: intregs, preferred-register: '', flags: [ ] }215 - { id: 11, class: predregs, preferred-register: '', flags: [ ] }216 - { id: 12, class: predregs, preferred-register: '', flags: [ ] }217 - { id: 13, class: intregs, preferred-register: '', flags: [ ] }218liveins:219 - { reg: '$r0', virtual-reg: '%9' }220frameInfo:221 isFrameAddressTaken: false222 isReturnAddressTaken: false223 hasStackMap: false224 hasPatchPoint: false225 stackSize: 0226 offsetAdjustment: 0227 maxAlignment: 1228 adjustsStack: false229 hasCalls: false230 stackProtector: ''231 functionContext: ''232 maxCallFrameSize: 4294967295233 cvBytesOfCalleeSavedRegisters: 0234 hasOpaqueSPAdjustment: false235 hasVAStart: false236 hasMustTailInVarArgFunc: false237 hasTailCall: false238 isCalleeSavedInfoValid: false239 localFrameSize: 0240 savePoint: []241 restorePoint: []242fixedStack: []243stack: []244entry_values: []245callSites: []246debugValueSubstitutions: []247constants: []248machineFunctionInfo: {}249body: |250 bb.0.entry:251 successors: %bb.1(0x80000000)252 liveins: $r0253 254 %9:intregs = COPY $r0255 %0:intregs = A2_addi %9, -4256 %1:intregs = S4_addi_asl_ri @a, %9, 3257 %2:intregs = A2_tfrsi @a258 %10:intregs = A2_tfrsi 256259 260 bb.1.do.body:261 successors: %bb.1(0x7c000000), %bb.2(0x04000000)262 263 %3:intregs = PHI %1, %bb.0, %8, %bb.1264 %4:intregs = PHI %0, %bb.0, %7, %bb.1265 %5:intregs = PHI %10, %bb.0, %13, %bb.1266 %13:intregs = S2_extractu %5, 8, 1267 S4_storeri_rr %2, %13, 2, %3 :: (store (s32) into %ir.cgep5, !tbaa !5)268 %7:intregs = A2_addi %4, 4269 %11:predregs = C2_cmpgti %7, 1073741835270 %8:intregs = A2_addi %3, 32271 J2_jumpf %11, %bb.1, implicit-def dead $pc272 J2_jump %bb.2, implicit-def dead $pc273 274 bb.2.do.end:275 PS_jmpret $r31, implicit-def dead $pc276 277...278