102 lines · plain
1; RUN: llc -mtriple=hexagon < %s2; REQUIRES: asserts3 4target triple = "hexagon"5 6%s.0 = type { i32, i32, [10 x %s.1] }7%s.1 = type { [4 x i32] }8%s.2 = type { i128 }9 10@g0 = external global ptr11 12; Function Attrs: nounwind ssp13define void @f0(ptr nocapture %a0, i32 %a1) #0 {14b0:15 br label %b116 17b1: ; preds = %b4, %b3, %b018 %v1 = phi i32 [ 0, %b0 ], [ %v14, %b4 ], [ %v13, %b3 ]19 switch i32 %v1, label %b4 [20 i32 0, label %b321 i32 1, label %b222 ]23 24b2: ; preds = %b125 br label %b326 27b3: ; preds = %b2, %b128 %v2 = phi i32 [ 1, %b2 ], [ 0, %b1 ]29 %v3 = phi i128 [ 64, %b2 ], [ 32, %b1 ]30 %v4 = phi i128 [ -79228162495817593519834398721, %b2 ], [ -18446744069414584321, %b1 ]31 %v5 = load ptr, ptr @g0, align 432 %v6 = getelementptr inbounds %s.0, ptr %v5, i32 0, i32 2, i32 %a1, i32 0, i32 %v233 %v7 = load i32, ptr %v6, align 434 %v8 = zext i32 %v7 to i12835 %v9 = load i128, ptr %a0, align 436 %v10 = shl nuw nsw i128 %v8, %v337 %v11 = and i128 %v9, %v438 %v12 = or i128 %v11, %v1039 store i128 %v12, ptr %a0, align 440 %v13 = add i32 %v1, 141 br label %b142 43b4: ; preds = %b144 %v14 = add i32 %v1, 145 %v15 = icmp eq i32 %v14, 446 br i1 %v15, label %b5, label %b147 48b5: ; preds = %b449 ret void50}51 52; Function Attrs: nounwind ssp53define void @f1(ptr nocapture %a0, i32 %a1) #0 {54b0:55 br label %b156 57b1: ; preds = %b5, %b4, %b058 %v1 = phi i32 [ 0, %b0 ], [ %v20, %b5 ], [ %v19, %b4 ]59 switch i32 %v1, label %b5 [60 i32 0, label %b261 i32 1, label %b362 ]63 64b2: ; preds = %b165 %v2 = load ptr, ptr @g0, align 466 %v3 = getelementptr inbounds %s.0, ptr %v2, i32 0, i32 2, i32 %a1, i32 0, i32 067 %v4 = load i32, ptr %v3, align 468 %v5 = zext i32 %v4 to i12869 %v6 = load i128, ptr %a0, align 470 %v7 = shl nuw nsw i128 %v5, 3271 %v8 = and i128 %v6, -1844674406941458432172 %v9 = or i128 %v8, %v773 br label %b474 75b3: ; preds = %b176 %v10 = load ptr, ptr @g0, align 477 %v11 = getelementptr inbounds %s.0, ptr %v10, i32 0, i32 2, i32 %a1, i32 0, i32 178 %v12 = load i32, ptr %v11, align 479 %v13 = zext i32 %v12 to i12880 %v14 = load i128, ptr %a0, align 481 %v15 = shl nuw nsw i128 %v13, 6482 %v16 = and i128 %v14, -7922816249581759351983439872183 %v17 = or i128 %v16, %v1584 br label %b485 86b4: ; preds = %b3, %b287 %v18 = phi i128 [ %v17, %b3 ], [ %v9, %b2 ]88 store i128 %v18, ptr %a0, align 489 %v19 = add i32 %v1, 190 br label %b191 92b5: ; preds = %b193 %v20 = add i32 %v1, 194 %v21 = icmp eq i32 %v20, 495 br i1 %v21, label %b6, label %b196 97b6: ; preds = %b598 ret void99}100 101attributes #0 = { nounwind ssp }102