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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; Check that we generate load instruction with (base + register offset << x)3 4; load word5 6define i32 @load_w(ptr nocapture %a, i32 %n, i32 %m) nounwind {7; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)8entry:9 %tmp = add i32 %n, %m10 %scevgep9 = getelementptr i32, ptr %a, i32 %tmp11 %val = load i32, ptr %scevgep9, align 412 ret i32 %val13}14 15; load unsigned half word16 17define i16 @load_uh(ptr nocapture %a, i32 %n, i32 %m) nounwind {18; CHECK: r{{[0-9]+}} = memuh(r{{[0-9]+}}+r{{[0-9]+}}<<#1)19entry:20 %tmp = add i32 %n, %m21 %scevgep9 = getelementptr i16, ptr %a, i32 %tmp22 %val = load i16, ptr %scevgep9, align 223 ret i16 %val24}25 26; load signed half word27 28define i32 @load_h(ptr nocapture %a, i32 %n, i32 %m) nounwind {29; CHECK: r{{[0-9]+}} = memh(r{{[0-9]+}}+r{{[0-9]+}}<<#1)30entry:31 %tmp = add i32 %n, %m32 %scevgep9 = getelementptr i16, ptr %a, i32 %tmp33 %val = load i16, ptr %scevgep9, align 234 %conv = sext i16 %val to i3235 ret i32 %conv36}37 38; load unsigned byte39 40define i8 @load_ub(ptr nocapture %a, i32 %n, i32 %m) nounwind {41; CHECK: r{{[0-9]+}} = memub(r{{[0-9]+}}+r{{[0-9]+}}<<#0)42entry:43 %tmp = add i32 %n, %m44 %scevgep9 = getelementptr i8, ptr %a, i32 %tmp45 %val = load i8, ptr %scevgep9, align 146 ret i8 %val47}48 49; load signed byte50 51define i32 @foo_2(ptr nocapture %a, i32 %n, i32 %m) nounwind {52; CHECK: r{{[0-9]+}} = memb(r{{[0-9]+}}+r{{[0-9]+}}<<#0)53entry:54 %tmp = add i32 %n, %m55 %scevgep9 = getelementptr i8, ptr %a, i32 %tmp56 %val = load i8, ptr %scevgep9, align 157 %conv = sext i8 %val to i3258 ret i32 %conv59}60 61; load doubleword62 63define i64 @load_d(ptr nocapture %a, i32 %n, i32 %m) nounwind {64; CHECK: r{{[0-9]+}}:{{[0-9]+}} = memd(r{{[0-9]+}}+r{{[0-9]+}}<<#3)65entry:66 %tmp = add i32 %n, %m67 %scevgep9 = getelementptr i64, ptr %a, i32 %tmp68 %val = load i64, ptr %scevgep9, align 869 ret i64 %val70}71