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1; RUN: llc -mtriple=hexagon -no-integrated-as < %s | FileCheck %s2 3; Check that constraints q and v are handled correctly.4; CHECK: q{{.}} = vgtw(v{{.}}.w,v{{.}}.w)5; CHECK: vand6; CHECK: vmem7 8target triple = "hexagon"9 10; Function Attrs: nounwind11define void @foo(<16 x i32> %v0, <16 x i32> %v1, ptr nocapture %p) #0 {12entry:13 %0 = tail call <64 x i1> asm "$0 = vgtw($1.w,$2.w)", "=q,v,v"(<16 x i32> %v0, <16 x i32> %v1) #114 %1 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %0, i32 -1) #115 store <16 x i32> %1, ptr %p, align 6416 ret void17}18 19declare <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1>, i32) #120 21attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }22attributes #1 = { nounwind readnone }23