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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; RUN: llc -mtriple=hexagon -O0 < %s | FileCheck -check-prefix=CHECK-CALL %s3; Hexagon Programmer's Reference Manual 11.2 CR4 5; CHECK-CALL-NOT: call6 7; Corner detection acceleration8declare i32 @llvm.hexagon.C4.fastcorner9(i32, i32)9define i32 @C4_fastcorner9(i32 %a, i32 %b) {10 %z = call i32@llvm.hexagon.C4.fastcorner9(i32 %a, i32 %b)11 ret i32 %z12}13; CHECK: = fastcorner9({{.*}},{{.*}})14 15declare i32 @llvm.hexagon.C4.fastcorner9.not(i32, i32)16define i32 @C4_fastcorner9_not(i32 %a, i32 %b) {17 %z = call i32@llvm.hexagon.C4.fastcorner9.not(i32 %a, i32 %b)18 ret i32 %z19}20; CHECK: = !fastcorner9({{.*}},{{.*}})21 22; Logical reductions on predicates23declare i32 @llvm.hexagon.C2.any8(i32)24define i32 @C2_any8(i32 %a) {25 %z = call i32@llvm.hexagon.C2.any8(i32 %a)26 ret i32 %z27}28; CHECK: = any8({{.*}})29 30declare i32 @llvm.hexagon.C2.all8(i32)31define i32 @C2_all8(i32 %a) {32 %z = call i32@llvm.hexagon.C2.all8(i32 %a)33 ret i32 %z34}35 36; CHECK: = all8({{.*}})37 38; Logical operations on predicates39declare i32 @llvm.hexagon.C2.and(i32, i32)40define i32 @C2_and(i32 %a, i32 %b) {41 %z = call i32@llvm.hexagon.C2.and(i32 %a, i32 %b)42 ret i32 %z43}44; CHECK: = and({{.*}},{{.*}})45 46declare i32 @llvm.hexagon.C4.and.and(i32, i32, i32)47define i32 @C4_and_and(i32 %a, i32 %b, i32 %c) {48 %z = call i32@llvm.hexagon.C4.and.and(i32 %a, i32 %b, i32 %c)49 ret i32 %z50}51; CHECK: = and({{.*}},and({{.*}},{{.*}}))52 53declare i32 @llvm.hexagon.C2.or(i32, i32)54define i32 @C2_or(i32 %a, i32 %b) {55 %z = call i32@llvm.hexagon.C2.or(i32 %a, i32 %b)56 ret i32 %z57}58; CHECK: = or({{.*}},{{.*}})59 60declare i32 @llvm.hexagon.C4.and.or(i32, i32, i32)61define i32 @C4_and_or(i32 %a, i32 %b, i32 %c) {62 %z = call i32@llvm.hexagon.C4.and.or(i32 %a, i32 %b, i32 %c)63 ret i32 %z64}65; CHECK: = and({{.*}},or({{.*}},{{.*}}))66 67declare i32 @llvm.hexagon.C2.xor(i32, i32)68define i32 @C2_xor(i32 %a, i32 %b) {69 %z = call i32@llvm.hexagon.C2.xor(i32 %a, i32 %b)70 ret i32 %z71}72; CHECK: = xor({{.*}},{{.*}})73 74declare i32 @llvm.hexagon.C4.or.and(i32, i32, i32)75define i32 @C4_or_and(i32 %a, i32 %b, i32 %c) {76 %z = call i32@llvm.hexagon.C4.or.and(i32 %a, i32 %b, i32 %c)77 ret i32 %z78}79; CHECK: = or({{.*}},and({{.*}},{{.*}}))80 81declare i32 @llvm.hexagon.C2.andn(i32, i32)82define i32 @C2_andn(i32 %a, i32 %b) {83 %z = call i32@llvm.hexagon.C2.andn(i32 %a, i32 %b)84 ret i32 %z85}86; CHECK: = and({{.*}},!{{.*}})87 88declare i32 @llvm.hexagon.C4.or.or(i32, i32, i32)89define i32 @C4_or_or(i32 %a, i32 %b, i32 %c) {90 %z = call i32@llvm.hexagon.C4.or.or(i32 %a, i32 %b, i32 %c)91 ret i32 %z92}93; CHECK: = or({{.*}},or({{.*}},{{.*}}))94 95declare i32 @llvm.hexagon.C4.and.andn(i32, i32, i32)96define i32 @C4_and_andn(i32 %a, i32 %b, i32 %c) {97 %z = call i32@llvm.hexagon.C4.and.andn(i32 %a, i32 %b, i32 %c)98 ret i32 %z99}100; CHECK: = and({{.*}},and({{.*}},!{{.*}}))101 102declare i32 @llvm.hexagon.C4.and.orn(i32, i32, i32)103define i32 @C4_and_orn(i32 %a, i32 %b, i32 %c) {104 %z = call i32@llvm.hexagon.C4.and.orn(i32 %a, i32 %b, i32 %c)105 ret i32 %z106}107; CHECK: = and({{.*}},or({{.*}},!{{.*}}))108 109declare i32 @llvm.hexagon.C2.not(i32)110define i32 @C2_not(i32 %a) {111 %z = call i32@llvm.hexagon.C2.not(i32 %a)112 ret i32 %z113}114; CHECK: = not({{.*}})115 116declare i32 @llvm.hexagon.C4.or.andn(i32, i32, i32)117define i32 @C4_or_andn(i32 %a, i32 %b, i32 %c) {118 %z = call i32@llvm.hexagon.C4.or.andn(i32 %a, i32 %b, i32 %c)119 ret i32 %z120}121; CHECK: = or({{.*}},and({{.*}},!{{.*}}))122 123declare i32 @llvm.hexagon.C2.orn(i32, i32)124define i32 @C2_orn(i32 %a, i32 %b) {125 %z = call i32@llvm.hexagon.C2.orn(i32 %a, i32 %b)126 ret i32 %z127}128; CHECK: = or({{.*}},!{{.*}})129 130declare i32 @llvm.hexagon.C4.or.orn(i32, i32, i32)131define i32 @C4_or_orn(i32 %a, i32 %b, i32 %c) {132 %z = call i32@llvm.hexagon.C4.or.orn(i32 %a, i32 %b, i32 %c)133 ret i32 %z134}135; CHECK: = or({{.*}},or({{.*}},!{{.*}}))136