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1; RUN: llc -mtriple=hexagon < %s2; REQUIRES: asserts3 4; The two loads based on %struct.0, loading two different data types5; cause LSR to assume type "void" for the memory type. This would then6; cause an assert in isLegalAddressingMode. Make sure we no longer crash.7 8target triple = "hexagon"9 10%struct.0 = type { ptr, i8, %union.anon.0 }11%union.anon.0 = type { ptr }12 13define hidden fastcc void @fred() unnamed_addr #0 {14entry:15 br i1 undef, label %while.end, label %while.body.lr.ph16 17while.body.lr.ph: ; preds = %entry18 br label %while.body19 20while.body: ; preds = %exit.2, %while.body.lr.ph21 %lsr.iv = phi ptr [ %cgep22, %exit.2 ], [ undef, %while.body.lr.ph ]22 switch i32 undef, label %exit [23 i32 1, label %sw.bb.i24 i32 2, label %sw.bb3.i25 ]26 27sw.bb.i: ; preds = %while.body28 unreachable29 30sw.bb3.i: ; preds = %while.body31 unreachable32 33exit: ; preds = %while.body34 switch i32 undef, label %exit.2 [35 i32 1, label %sw.bb.i1736 i32 2, label %sw.bb3.i2037 ]38 39sw.bb.i17: ; preds = %.exit40 %0 = load i32, ptr %lsr.iv, align 441 unreachable42 43sw.bb3.i20: ; preds = %exit44 %1 = load ptr, ptr %lsr.iv, align 445 unreachable46 47exit.2: ; preds = %exit48 %cgep22 = getelementptr %struct.0, ptr %lsr.iv, i32 149 br label %while.body50 51while.end: ; preds = %entry52 ret void53}54 55attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }56 57