40 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -mtriple=hexagon-unknown-elf < %s | FileCheck %s3 4; In ISelLowering, when folding nodes (or (shl xx, s), (zext y))5; to (COMBINE (shl xx, s-32), y) where s >= 32,6; check that resulting shift value does not create an undef7 8 9target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"10target triple = "hexagon"11 12; Function Attrs: nofree nosync nounwind memory(readwrite, inaccessiblemem: none)13define dso_local void @foo(i64* nocapture noundef %buf, i32 %a, i32 %b) local_unnamed_addr {14; CHECK-LABEL: foo:15; CHECK: .cfi_startproc16; CHECK-NEXT: // %bb.0: // %entry17; CHECK-NEXT: {18; CHECK-NEXT: r2 = addasl(r2,r1,#1)19; CHECK-NEXT: r3 = asl(r1,#1)20; CHECK-NEXT: }21; CHECK-NEXT: {22; CHECK-NEXT: r2 = addasl(r2,r1,#1)23; CHECK-NEXT: }24; CHECK-NEXT: {25; CHECK-NEXT: jumpr r3126; CHECK-NEXT: memd(r0+#8) = r3:227; CHECK-NEXT: }28entry:29 %arrayidx = getelementptr inbounds i64, i64* %buf, i32 130 %add0 = shl nsw i32 %a, 131 %add1 = add nsw i32 %add0, %b32 %add2 = add nsw i32 %add1, %add033 %ext0 = zext i32 %add0 to i6434 %shift0 = shl nuw i64 %ext0, 3235 %ext1 = zext i32 %add2 to i6436 %or0 = or i64 %shift0, %ext137 store i64 %or0, i64* %arrayidx, align 838 ret void39}40