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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=hexagon < %s | FileCheck %s3 4define i64 @f0(ptr %a0, <8 x i8> %a1) #0 {5; CHECK-LABEL: f0:6; CHECK: // %bb.0: // %b07; CHECK-NEXT: {8; CHECK-NEXT: r0 = memub(r0+#0)9; CHECK-NEXT: }10; CHECK-NEXT: {11; CHECK-NEXT: r1 = #012; CHECK-NEXT: }13; CHECK-NEXT: {14; CHECK-NEXT: p0 = r015; CHECK-NEXT: }16; CHECK-NEXT: {17; CHECK-NEXT: r5:4 = vsplatb(r1)18; CHECK-NEXT: }19; CHECK-NEXT: {20; CHECK-NEXT: r1:0 = vmux(p0,r3:2,r5:4)21; CHECK-NEXT: }22; CHECK-NEXT: {23; CHECK-NEXT: jumpr r3124; CHECK-NEXT: }25b0:26 %v0 = load <8 x i1>, ptr %a0, align 127 %v1 = select <8 x i1> %v0, <8 x i8> %a1, <8 x i8> zeroinitializer28 %v2 = bitcast <8 x i8> %v1 to i6429 ret i64 %v230}31 32define i32 @f1(ptr %a0, <4 x i8> %a1) #0 {33; CHECK-LABEL: f1:34; CHECK: // %bb.0: // %b035; CHECK-NEXT: {36; CHECK-NEXT: r0 = memub(r0+#0)37; CHECK-NEXT: }38; CHECK-NEXT: {39; CHECK-NEXT: r3:2 = combine(#0,#0)40; CHECK-NEXT: }41; CHECK-NEXT: {42; CHECK-NEXT: r5:4 = vzxtbh(r1)43; CHECK-NEXT: }44; CHECK-NEXT: {45; CHECK-NEXT: p0 = r046; CHECK-NEXT: }47; CHECK-NEXT: {48; CHECK-NEXT: r1:0 = vmux(p0,r5:4,r3:2)49; CHECK-NEXT: }50; CHECK-NEXT: {51; CHECK-NEXT: r0 = vtrunehb(r1:0)52; CHECK-NEXT: }53; CHECK-NEXT: {54; CHECK-NEXT: jumpr r3155; CHECK-NEXT: }56b0:57 %v0 = load <4 x i1>, ptr %a0, align 158 %v1 = select <4 x i1> %v0, <4 x i8> %a1, <4 x i8> zeroinitializer59 %v2 = bitcast <4 x i8> %v1 to i3260 ret i32 %v261}62 63define i16 @f2(ptr %a0, <2 x i8> %a1) #0 {64; CHECK-LABEL: f2:65; CHECK: // %bb.0: // %b066; CHECK-NEXT: {67; CHECK-NEXT: r0 = memub(r0+#0)68; CHECK-NEXT: }69; CHECK-NEXT: {70; CHECK-NEXT: p1 = tstbit(r0,#4)71; CHECK-NEXT: }72; CHECK-NEXT: {73; CHECK-NEXT: p0 = r074; CHECK-NEXT: }75; CHECK-NEXT: {76; CHECK-NEXT: r1 = mux(p1,r3,#0)77; CHECK-NEXT: }78; CHECK-NEXT: {79; CHECK-NEXT: r0 = mux(p0,r2,#0)80; CHECK-NEXT: }81; CHECK-NEXT: {82; CHECK-NEXT: r0 = insert(r1,#24,#8)83; CHECK-NEXT: }84; CHECK-NEXT: {85; CHECK-NEXT: jumpr r3186; CHECK-NEXT: }87b0:88 %v0 = load <2 x i1>, ptr %a0, align 189 %v1 = select <2 x i1> %v0, <2 x i8> %a1, <2 x i8> zeroinitializer90 %v2 = bitcast <2 x i8> %v1 to i1691 ret i16 %v292}93 94define i8 @f3(ptr %a0, <1 x i8> %a1) #0 {95; CHECK-LABEL: f3:96; CHECK: // %bb.0: // %b097; CHECK-NEXT: {98; CHECK-NEXT: r0 = memub(r0+#0)99; CHECK-NEXT: }100; CHECK-NEXT: {101; CHECK-NEXT: p0 = r0102; CHECK-NEXT: }103; CHECK-NEXT: {104; CHECK-NEXT: r0 = mux(p0,r1,#0)105; CHECK-NEXT: }106; CHECK-NEXT: {107; CHECK-NEXT: jumpr r31108; CHECK-NEXT: }109b0:110 %v0 = load <1 x i1>, ptr %a0, align 1111 %v1 = select <1 x i1> %v0, <1 x i8> %a1, <1 x i8> zeroinitializer112 %v2 = bitcast <1 x i8> %v1 to i8113 ret i8 %v2114}115 116define void @f4(ptr %a0, i64 %a1) #0 {117; CHECK-LABEL: f4:118; CHECK: // %bb.0: // %b0119; CHECK-NEXT: {120; CHECK-NEXT: r1 = #0121; CHECK-NEXT: }122; CHECK-NEXT: {123; CHECK-NEXT: r5:4 = vsplatb(r1)124; CHECK-NEXT: }125; CHECK-NEXT: {126; CHECK-NEXT: p0 = vcmpb.eq(r3:2,r5:4)127; CHECK-NEXT: }128; CHECK-NEXT: {129; CHECK-NEXT: p0 = not(p0)130; CHECK-NEXT: }131; CHECK-NEXT: {132; CHECK-NEXT: r2 = p0133; CHECK-NEXT: }134; CHECK-NEXT: {135; CHECK-NEXT: memb(r0+#0) = r2136; CHECK-NEXT: }137; CHECK-NEXT: {138; CHECK-NEXT: jumpr r31139; CHECK-NEXT: }140b0:141 %v0 = bitcast i64 %a1 to <8 x i8>142 %v1 = icmp ne <8 x i8> %v0, zeroinitializer143 store <8 x i1> %v1, ptr %a0, align 1144 ret void145}146 147define void @f5(ptr %a0, i32 %a1) #0 {148; CHECK-LABEL: f5:149; CHECK: // %bb.0: // %b0150; CHECK-NEXT: {151; CHECK-NEXT: r3:2 = vsxtbh(r1)152; CHECK-NEXT: }153; CHECK-NEXT: {154; CHECK-NEXT: r5:4 = combine(#0,#0)155; CHECK-NEXT: }156; CHECK-NEXT: {157; CHECK-NEXT: p0 = vcmph.eq(r3:2,r5:4)158; CHECK-NEXT: }159; CHECK-NEXT: {160; CHECK-NEXT: p0 = not(p0)161; CHECK-NEXT: }162; CHECK-NEXT: {163; CHECK-NEXT: r2 = p0164; CHECK-NEXT: }165; CHECK-NEXT: {166; CHECK-NEXT: memb(r0+#0) = r2167; CHECK-NEXT: }168; CHECK-NEXT: {169; CHECK-NEXT: jumpr r31170; CHECK-NEXT: }171b0:172 %v0 = bitcast i32 %a1 to <4 x i8>173 %v1 = icmp ne <4 x i8> %v0, zeroinitializer174 store <4 x i1> %v1, ptr %a0, align 1175 ret void176}177 178define void @f6(ptr %a0, i16 %a1) #0 {179; CHECK-LABEL: f6:180; CHECK: // %bb.0: // %b0181; CHECK-NEXT: {182; CHECK-NEXT: r2 = #255183; CHECK-NEXT: }184; CHECK-NEXT: {185; CHECK-NEXT: r3 = extractu(r1,#8,#8)186; CHECK-NEXT: }187; CHECK-NEXT: {188; CHECK-NEXT: p1 = !bitsclr(r1,r2)189; CHECK-NEXT: }190; CHECK-NEXT: {191; CHECK-NEXT: p0 = cmp.eq(r3,#0)192; CHECK-NEXT: }193; CHECK-NEXT: {194; CHECK-NEXT: if (p0) r3 = #0195; CHECK-NEXT: }196; CHECK-NEXT: {197; CHECK-NEXT: r1 = mux(p1,#8,#0)198; CHECK-NEXT: }199; CHECK-NEXT: {200; CHECK-NEXT: r2 = mux(p1,#2,#0)201; CHECK-NEXT: }202; CHECK-NEXT: {203; CHECK-NEXT: if (!p0) r3 = #128204; CHECK-NEXT: }205; CHECK-NEXT: {206; CHECK-NEXT: r4 = mux(p0,#0,#32)207; CHECK-NEXT: }208; CHECK-NEXT: {209; CHECK-NEXT: r5 = setbit(r1,#2)210; CHECK-NEXT: }211; CHECK-NEXT: {212; CHECK-NEXT: r6 = setbit(r2,#0)213; CHECK-NEXT: }214; CHECK-NEXT: {215; CHECK-NEXT: if (!p1) r5 = add(r1,#0)216; CHECK-NEXT: }217; CHECK-NEXT: {218; CHECK-NEXT: r1 = setbit(r3,#6)219; CHECK-NEXT: }220; CHECK-NEXT: {221; CHECK-NEXT: if (!p1) r6 = add(r2,#0)222; CHECK-NEXT: }223; CHECK-NEXT: {224; CHECK-NEXT: r2 = setbit(r4,#4)225; CHECK-NEXT: }226; CHECK-NEXT: {227; CHECK-NEXT: if (!p0) r4 = add(r2,#0)228; CHECK-NEXT: }229; CHECK-NEXT: {230; CHECK-NEXT: if (!p0) r3 = add(r1,#0)231; CHECK-NEXT: }232; CHECK-NEXT: {233; CHECK-NEXT: r2 = or(r6,r5)234; CHECK-NEXT: }235; CHECK-NEXT: {236; CHECK-NEXT: r2 |= or(r4,r3)237; CHECK-NEXT: }238; CHECK-NEXT: {239; CHECK-NEXT: memb(r0+#0) = r2240; CHECK-NEXT: }241; CHECK-NEXT: {242; CHECK-NEXT: jumpr r31243; CHECK-NEXT: }244b0:245 %v0 = bitcast i16 %a1 to <2 x i8>246 %v1 = icmp ne <2 x i8> %v0, zeroinitializer247 store <2 x i1> %v1, ptr %a0, align 1248 ret void249}250 251define void @f7(ptr %a0, i8 %a1) #0 {252; CHECK-LABEL: f7:253; CHECK: // %bb.0: // %b0254; CHECK-NEXT: {255; CHECK-NEXT: r2 = #255256; CHECK-NEXT: }257; CHECK-NEXT: {258; CHECK-NEXT: p0 = !bitsclr(r1,r2)259; CHECK-NEXT: }260; CHECK-NEXT: {261; CHECK-NEXT: r1 = mux(p0,#1,#0)262; CHECK-NEXT: }263; CHECK-NEXT: {264; CHECK-NEXT: memb(r0+#0) = r1265; CHECK-NEXT: }266; CHECK-NEXT: {267; CHECK-NEXT: jumpr r31268; CHECK-NEXT: }269b0:270 %v0 = bitcast i8 %a1 to <1 x i8>271 %v1 = icmp ne <1 x i8> %v0, zeroinitializer272 store <1 x i1> %v1, ptr %a0, align 1273 ret void274}275 276attributes #0 = { nounwind "target-features"="-packets" }277