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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3; min4 5; CHECK-LABEL: test_00:6; CHECK: r1:0 = vminb(r1:0,r3:2)7define <8 x i8> @test_00(<8 x i8> %a0, <8 x i8> %a1) #0 {8 %v0 = icmp slt <8 x i8> %a0, %a19 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a110 ret <8 x i8> %v111}12 13; CHECK-LABEL: test_01:14; CHECK: r1:0 = vminb(r1:0,r3:2)15define <8 x i8> @test_01(<8 x i8> %a0, <8 x i8> %a1) #0 {16 %v0 = icmp sle <8 x i8> %a0, %a117 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a118 ret <8 x i8> %v119}20 21; CHECK-LABEL: test_02:22; CHECK: r1:0 = vminh(r1:0,r3:2)23define <4 x i16> @test_02(<4 x i16> %a0, <4 x i16> %a1) #0 {24 %v0 = icmp slt <4 x i16> %a0, %a125 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a126 ret <4 x i16> %v127}28 29; CHECK-LABEL: test_03:30; CHECK: r1:0 = vminh(r1:0,r3:2)31define <4 x i16> @test_03(<4 x i16> %a0, <4 x i16> %a1) #0 {32 %v0 = icmp sle <4 x i16> %a0, %a133 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a134 ret <4 x i16> %v135}36 37; CHECK-LABEL: test_04:38; CHECK: r1:0 = vminw(r1:0,r3:2)39define <2 x i32> @test_04(<2 x i32> %a0, <2 x i32> %a1) #0 {40 %v0 = icmp slt <2 x i32> %a0, %a141 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a142 ret <2 x i32> %v143}44 45; CHECK-LABEL: test_05:46; CHECK: r1:0 = vminw(r1:0,r3:2)47define <2 x i32> @test_05(<2 x i32> %a0, <2 x i32> %a1) #0 {48 %v0 = icmp sle <2 x i32> %a0, %a149 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a150 ret <2 x i32> %v151}52 53; minu54 55; CHECK-LABEL: test_06:56; CHECK: r1:0 = vminub(r1:0,r3:2)57define <8 x i8> @test_06(<8 x i8> %a0, <8 x i8> %a1) #0 {58 %v0 = icmp ult <8 x i8> %a0, %a159 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a160 ret <8 x i8> %v161}62 63; CHECK-LABEL: test_07:64; CHECK: r1:0 = vminub(r1:0,r3:2)65define <8 x i8> @test_07(<8 x i8> %a0, <8 x i8> %a1) #0 {66 %v0 = icmp ule <8 x i8> %a0, %a167 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a168 ret <8 x i8> %v169}70 71; CHECK-LABEL: test_08:72; CHECK: r1:0 = vminuh(r1:0,r3:2)73define <4 x i16> @test_08(<4 x i16> %a0, <4 x i16> %a1) #0 {74 %v0 = icmp ult <4 x i16> %a0, %a175 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a176 ret <4 x i16> %v177}78 79; CHECK-LABEL: test_09:80; CHECK: r1:0 = vminuh(r1:0,r3:2)81define <4 x i16> @test_09(<4 x i16> %a0, <4 x i16> %a1) #0 {82 %v0 = icmp ule <4 x i16> %a0, %a183 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a184 ret <4 x i16> %v185}86 87; CHECK-LABEL: test_0a:88; CHECK: r1:0 = vminuw(r1:0,r3:2)89define <2 x i32> @test_0a(<2 x i32> %a0, <2 x i32> %a1) #0 {90 %v0 = icmp ult <2 x i32> %a0, %a191 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a192 ret <2 x i32> %v193}94 95; CHECK-LABEL: test_0b:96; CHECK: r1:0 = vminuw(r1:0,r3:2)97define <2 x i32> @test_0b(<2 x i32> %a0, <2 x i32> %a1) #0 {98 %v0 = icmp ule <2 x i32> %a0, %a199 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a1100 ret <2 x i32> %v1101}102 103; max104 105; CHECK-LABEL: test_0c:106; CHECK: r1:0 = vmaxb(r1:0,r3:2)107define <8 x i8> @test_0c(<8 x i8> %a0, <8 x i8> %a1) #0 {108 %v0 = icmp sgt <8 x i8> %a0, %a1109 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a1110 ret <8 x i8> %v1111}112 113; CHECK-LABEL: test_0d:114; CHECK: r1:0 = vmaxb(r1:0,r3:2)115define <8 x i8> @test_0d(<8 x i8> %a0, <8 x i8> %a1) #0 {116 %v0 = icmp sge <8 x i8> %a0, %a1117 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a1118 ret <8 x i8> %v1119}120 121; CHECK-LABEL: test_0e:122; CHECK: r1:0 = vmaxh(r1:0,r3:2)123define <4 x i16> @test_0e(<4 x i16> %a0, <4 x i16> %a1) #0 {124 %v0 = icmp sgt <4 x i16> %a0, %a1125 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a1126 ret <4 x i16> %v1127}128 129; CHECK-LABEL: test_0f:130; CHECK: r1:0 = vmaxh(r1:0,r3:2)131define <4 x i16> @test_0f(<4 x i16> %a0, <4 x i16> %a1) #0 {132 %v0 = icmp sge <4 x i16> %a0, %a1133 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a1134 ret <4 x i16> %v1135}136 137; CHECK-LABEL: test_10:138; CHECK: r1:0 = vmaxw(r1:0,r3:2)139define <2 x i32> @test_10(<2 x i32> %a0, <2 x i32> %a1) #0 {140 %v0 = icmp sgt <2 x i32> %a0, %a1141 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a1142 ret <2 x i32> %v1143}144 145; CHECK-LABEL: test_11:146; CHECK: r1:0 = vmaxw(r1:0,r3:2)147define <2 x i32> @test_11(<2 x i32> %a0, <2 x i32> %a1) #0 {148 %v0 = icmp sge <2 x i32> %a0, %a1149 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a1150 ret <2 x i32> %v1151}152 153; maxu154 155; CHECK-LABEL: test_12:156; CHECK: r1:0 = vmaxub(r1:0,r3:2)157define <8 x i8> @test_12(<8 x i8> %a0, <8 x i8> %a1) #0 {158 %v0 = icmp ugt <8 x i8> %a0, %a1159 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a1160 ret <8 x i8> %v1161}162 163; CHECK-LABEL: test_13:164; CHECK: r1:0 = vmaxub(r1:0,r3:2)165define <8 x i8> @test_13(<8 x i8> %a0, <8 x i8> %a1) #0 {166 %v0 = icmp uge <8 x i8> %a0, %a1167 %v1 = select <8 x i1> %v0, <8 x i8> %a0, <8 x i8> %a1168 ret <8 x i8> %v1169}170 171; CHECK-LABEL: test_14:172; CHECK: r1:0 = vmaxuh(r1:0,r3:2)173define <4 x i16> @test_14(<4 x i16> %a0, <4 x i16> %a1) #0 {174 %v0 = icmp ugt <4 x i16> %a0, %a1175 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a1176 ret <4 x i16> %v1177}178 179; CHECK-LABEL: test_15:180; CHECK: r1:0 = vmaxuh(r1:0,r3:2)181define <4 x i16> @test_15(<4 x i16> %a0, <4 x i16> %a1) #0 {182 %v0 = icmp uge <4 x i16> %a0, %a1183 %v1 = select <4 x i1> %v0, <4 x i16> %a0, <4 x i16> %a1184 ret <4 x i16> %v1185}186 187; CHECK-LABEL: test_16:188; CHECK: r1:0 = vmaxuw(r1:0,r3:2)189define <2 x i32> @test_16(<2 x i32> %a0, <2 x i32> %a1) #0 {190 %v0 = icmp ugt <2 x i32> %a0, %a1191 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a1192 ret <2 x i32> %v1193}194 195; CHECK-LABEL: test_17:196; CHECK: r1:0 = vmaxuw(r1:0,r3:2)197define <2 x i32> @test_17(<2 x i32> %a0, <2 x i32> %a1) #0 {198 %v0 = icmp uge <2 x i32> %a0, %a1199 %v1 = select <2 x i1> %v0, <2 x i32> %a0, <2 x i32> %a1200 ret <2 x i32> %v1201}202 203