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1; REQUIRES: asserts2; RUN: llc -O3 -mtriple=hexagon < %s -o /dev/null3; Make sure that this doesn't crash.4; This test validates that the compiler would not assert when analyzing the5; offset of V6_vS32b_pred_ai instruction6 7%struct.pluto = type <{ ptr, i16, ptr }>8 9@global = external hidden unnamed_addr constant [62 x i8], align 110@global.1 = external hidden unnamed_addr constant [47 x i8], align 111@global.2 = hidden local_unnamed_addr constant %struct.pluto <{ ptr @global, i16 892, ptr @global.1 }>, align 112@global.3 = local_unnamed_addr constant [1 x i32] zeroinitializer13 14; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write)15declare void @llvm.assume(i1 noundef) #016 17; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)18declare <32 x i32> @llvm.hexagon.V6.vd0.128B() #119 20; Function Attrs: noinline nounwind21declare hidden fastcc void @zot(i32, i32, i32, i32) unnamed_addr #222 23; Function Attrs: noinline nounwind24define void @barney(ptr nocapture %arg, ptr nocapture readnone %arg1, i8 signext %arg2, i32 %arg3, ptr nocapture readnone %arg4, ptr nocapture readnone %arg5, i32 %arg6, i32 %arg7, ptr nocapture readnone %arg8, ptr nocapture readnone %arg9, ptr nocapture readnone %arg10, ptr nocapture readnone %arg11, ptr nocapture readnone %arg12, ptr nocapture readnone %arg13, ptr nocapture readnone %arg14, ptr nocapture readnone %arg15, ptr nocapture readnone %arg16, ptr nocapture readnone %arg17) local_unnamed_addr #2 {25bb:26 %icmp = icmp ult i32 %arg3, 427 tail call void @llvm.assume(i1 %icmp) #328 %call = tail call <32 x i32> @llvm.hexagon.V6.vd0.128B() #329 br label %bb1830 31bb18: ; preds = %bb22, %bb32 %phi = phi i32 [ %and, %bb22 ], [ %arg3, %bb ]33 %phi19 = phi i32 [ %add23, %bb22 ], [ 4, %bb ]34 %icmp20 = icmp eq i32 %phi, 035 br i1 %icmp20, label %bb21, label %bb2236 37bb21: ; preds = %bb1838 %shl = shl i32 %phi19, 839 %getelementptr = getelementptr inbounds i8, ptr %arg, i32 %shl40 %bitcast = bitcast ptr %getelementptr to ptr41 store <32 x i32> %call, ptr %bitcast, align 12842 br label %bb2243 44bb22: ; preds = %bb21, %bb1845 %add = add nuw nsw i32 %phi, 146 %and = and i32 %add, 347 %add23 = add nuw nsw i32 %phi19, 148 %icmp24 = icmp eq i32 %add23, 849 br i1 %icmp24, label %bb25, label %bb1850 51bb25: ; preds = %bb2252 tail call fastcc void @zot(i32 %arg6, i32 %arg7, i32 0, i32 %arg3)53 ret void54}55 56attributes #0 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) }57attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }58attributes #2 = { noinline nounwind "target-cpu"="hexagonv68" "target-features"="+hvx-length128b,+hvxv68,+v68,+hvx-ieee-fp,-long-calls,-small-data" "unsafe-fp-math"="true" "use-soft-float"="false" }59attributes #3 = { nounwind }60