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1; RUN: llc -O3 -mtriple=hexagon < %s | FileCheck %s2 3; CHECK: loop0(.[[BLOCK:LBB0_[0-9]+]]4; CHECK: .[[BLOCK]]:5; CHECK: = vmemu({{r[0-9]+}}++#1)6; CHECK: = vmemu({{r[0-9]+}}++#1)7; CHECK: = vmemu({{r[0-9]+}}++#1)8; CHECK: = vmemu({{r[0-9]+}}++#1)9; CHECK: endloop010 11target triple = "hexagon-unknown--elf"12 13%0 = type { ptr, i32, i32, i32, i32, ptr, ptr, ptr }14%1 = type { %2 }15%2 = type { i64 }16%3 = type { ptr, i32, i32, i32, i32, i32, i32, ptr, i32, ptr }17%4 = type { i64, ptr, [4 x i32], [4 x i32], [4 x i32], i32, i8, i8, [6 x i8] }18 19@g0 = private unnamed_addr constant [5 x i8] c"Load\00", align 120@g1 = private unnamed_addr constant [6 x i8] c"Store\00", align 121@g2 = private unnamed_addr constant [18 x i8] c"Begin realization\00", align 122@g3 = private unnamed_addr constant [16 x i8] c"End realization\00", align 123@g4 = private unnamed_addr constant [8 x i8] c"Produce\00", align 124@g5 = private unnamed_addr constant [7 x i8] c"Update\00", align 125@g6 = private unnamed_addr constant [8 x i8] c"Consume\00", align 126@g7 = private unnamed_addr constant [12 x i8] c"End consume\00", align 127@g8 = private constant [6 x i8] c"input\00", align 3228@g9 = private constant [10 x i8] c"dilate3x3\00", align 3229@g10 = private constant [2 x %0] [%0 { ptr @g8, i32 1, i32 2, i32 1, i32 8, ptr null, ptr null, ptr null }, %0 { ptr @g9, i32 2, i32 2, i32 1, i32 8, ptr null, ptr null, ptr null }]30@g11 = private constant [64 x i8] c"...............................................................\00", align 3231 32; Function Attrs: nounwind33declare ptr @f0(ptr, i32) #034 35; Function Attrs: nounwind36declare void @f1(ptr, ptr) #037 38; Function Attrs: nounwind39declare void @f2(ptr, ptr) #040 41; Function Attrs: nounwind42declare i32 @f3(ptr, ptr) #043 44; Function Attrs: nounwind45declare void @f4() #046 47; Function Attrs: nounwind48declare void @f5() #049 50; Function Attrs: nounwind51define i32 @f6(ptr noalias nocapture readonly %a0, ptr noalias nocapture readonly %a1) #0 {52b0:53 %v0 = getelementptr inbounds %4, ptr %a0, i32 0, i32 154 %v1 = load ptr, ptr %v0, align 455 %v2 = getelementptr inbounds %4, ptr %a0, i32 0, i32 3, i32 156 %v3 = load i32, ptr %v2, align 457 %v4 = getelementptr inbounds %4, ptr %a0, i32 0, i32 4, i32 058 %v5 = load i32, ptr %v4, align 459 %v6 = getelementptr inbounds %4, ptr %a0, i32 0, i32 4, i32 160 %v7 = load i32, ptr %v6, align 461 %v8 = getelementptr inbounds %4, ptr %a1, i32 0, i32 162 %v9 = load ptr, ptr %v8, align 463 %v10 = getelementptr inbounds %4, ptr %a1, i32 0, i32 2, i32 064 %v11 = load i32, ptr %v10, align 465 %v12 = getelementptr inbounds %4, ptr %a1, i32 0, i32 3, i32 166 %v13 = load i32, ptr %v12, align 467 %v14 = getelementptr inbounds %4, ptr %a1, i32 0, i32 4, i32 068 %v15 = load i32, ptr %v14, align 469 %v16 = getelementptr inbounds %4, ptr %a1, i32 0, i32 4, i32 170 %v17 = load i32, ptr %v16, align 471 %v18 = getelementptr inbounds %4, ptr %a1, i32 0, i32 2, i32 172 %v19 = load i32, ptr %v18, align 473 %v20 = add nsw i32 %v19, %v1774 %v21 = icmp sgt i32 %v19, 075 br i1 %v21, label %b1, label %b11, !prof !376 77b1: ; preds = %b078 %v22 = ashr i32 %v11, 779 %v23 = icmp slt i32 %v22, 080 %v24 = select i1 %v23, i32 0, i32 %v2281 %v25 = icmp sgt i32 %v24, 082 br i1 %v25, label %b5, label %b7, !prof !383 84b2: ; preds = %b5, %b285 %v26 = phi i32 [ %v90, %b2 ], [ 0, %b5 ]86 %v27 = mul nsw i32 %v7, %v387 %v28 = add nsw i32 %v27, %v588 %v29 = shl nsw i32 %v26, 789 %v30 = add nsw i32 %v29, %v1590 %v31 = add nsw i32 %v150, -191 %v32 = mul nsw i32 %v31, %v392 %v33 = mul nsw i32 %v150, %v393 %v34 = add nsw i32 %v150, 194 %v35 = mul nsw i32 %v34, %v395 %v36 = sub i32 %v32, %v2896 %v37 = add i32 %v36, %v3097 %v38 = add nsw i32 %v37, -198 %v39 = getelementptr inbounds i8, ptr %v1, i32 %v3899 %v41 = load <32 x i32>, ptr %v39, align 1, !tbaa !4100 %v42 = getelementptr inbounds i8, ptr %v1, i32 %v37101 %v44 = load <32 x i32>, ptr %v42, align 1, !tbaa !4102 %v45 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v41, <32 x i32> %v44)103 %v46 = add nsw i32 %v37, 1104 %v47 = getelementptr inbounds i8, ptr %v1, i32 %v46105 %v49 = load <32 x i32>, ptr %v47, align 1, !tbaa !4106 %v50 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v45, <32 x i32> %v49)107 %v51 = sub i32 %v33, %v28108 %v52 = add i32 %v51, %v30109 %v53 = add nsw i32 %v52, -1110 %v54 = getelementptr inbounds i8, ptr %v1, i32 %v53111 %v56 = load <32 x i32>, ptr %v54, align 1, !tbaa !4112 %v57 = getelementptr inbounds i8, ptr %v1, i32 %v52113 %v59 = load <32 x i32>, ptr %v57, align 1, !tbaa !4114 %v60 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v56, <32 x i32> %v59)115 %v61 = add nsw i32 %v52, 1116 %v62 = getelementptr inbounds i8, ptr %v1, i32 %v61117 %v64 = load <32 x i32>, ptr %v62, align 1, !tbaa !4118 %v65 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v60, <32 x i32> %v64)119 %v66 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v50, <32 x i32> %v65)120 %v67 = sub i32 %v35, %v28121 %v68 = add i32 %v67, %v30122 %v69 = add nsw i32 %v68, -1123 %v70 = getelementptr inbounds i8, ptr %v1, i32 %v69124 %v72 = load <32 x i32>, ptr %v70, align 1, !tbaa !4125 %v73 = getelementptr inbounds i8, ptr %v1, i32 %v68126 %v75 = load <32 x i32>, ptr %v73, align 1, !tbaa !4127 %v76 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v72, <32 x i32> %v75)128 %v77 = add nsw i32 %v68, 1129 %v78 = getelementptr inbounds i8, ptr %v1, i32 %v77130 %v80 = load <32 x i32>, ptr %v78, align 1, !tbaa !4131 %v81 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v76, <32 x i32> %v80)132 %v82 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v66, <32 x i32> %v81)133 %v83 = mul nsw i32 %v150, %v13134 %v84 = mul nsw i32 %v17, %v13135 %v85 = add i32 %v84, %v15136 %v86 = sub i32 %v83, %v85137 %v87 = add i32 %v86, %v30138 %v88 = getelementptr inbounds i8, ptr %v9, i32 %v87139 store <32 x i32> %v82, ptr %v88, align 1, !tbaa !7140 %v90 = add nuw nsw i32 %v26, 1141 %v91 = icmp eq i32 %v90, %v24142 br i1 %v91, label %b6, label %b2143 144b3: ; preds = %b6, %b3145 %v92 = phi i32 [ %v147, %b3 ], [ %v24, %b6 ]146 %v93 = add nsw i32 %v15, %v11147 %v94 = sub i32 %v93, %v28148 %v95 = add i32 %v94, %v32149 %v96 = add nsw i32 %v95, -129150 %v97 = getelementptr inbounds i8, ptr %v1, i32 %v96151 %v99 = load <32 x i32>, ptr %v97, align 1, !tbaa !4152 %v100 = add nsw i32 %v95, -128153 %v101 = getelementptr inbounds i8, ptr %v1, i32 %v100154 %v103 = load <32 x i32>, ptr %v101, align 1, !tbaa !4155 %v104 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v99, <32 x i32> %v103)156 %v105 = add nsw i32 %v95, -127157 %v106 = getelementptr inbounds i8, ptr %v1, i32 %v105158 %v108 = load <32 x i32>, ptr %v106, align 1, !tbaa !4159 %v109 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v104, <32 x i32> %v108)160 %v110 = add i32 %v94, %v33161 %v111 = add nsw i32 %v110, -129162 %v112 = getelementptr inbounds i8, ptr %v1, i32 %v111163 %v114 = load <32 x i32>, ptr %v112, align 1, !tbaa !4164 %v115 = add nsw i32 %v110, -128165 %v116 = getelementptr inbounds i8, ptr %v1, i32 %v115166 %v118 = load <32 x i32>, ptr %v116, align 1, !tbaa !4167 %v119 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v114, <32 x i32> %v118)168 %v120 = add nsw i32 %v110, -127169 %v121 = getelementptr inbounds i8, ptr %v1, i32 %v120170 %v123 = load <32 x i32>, ptr %v121, align 1, !tbaa !4171 %v124 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v119, <32 x i32> %v123)172 %v125 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v109, <32 x i32> %v124)173 %v126 = add i32 %v94, %v35174 %v127 = add nsw i32 %v126, -129175 %v128 = getelementptr inbounds i8, ptr %v1, i32 %v127176 %v130 = load <32 x i32>, ptr %v128, align 1, !tbaa !4177 %v131 = add nsw i32 %v126, -128178 %v132 = getelementptr inbounds i8, ptr %v1, i32 %v131179 %v134 = load <32 x i32>, ptr %v132, align 1, !tbaa !4180 %v135 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v130, <32 x i32> %v134)181 %v136 = add nsw i32 %v126, -127182 %v137 = getelementptr inbounds i8, ptr %v1, i32 %v136183 %v139 = load <32 x i32>, ptr %v137, align 1, !tbaa !4184 %v140 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v135, <32 x i32> %v139)185 %v141 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v125, <32 x i32> %v140)186 %v142 = add i32 %v11, -128187 %v143 = sub i32 %v142, %v84188 %v144 = add i32 %v143, %v83189 %v145 = getelementptr inbounds i8, ptr %v9, i32 %v144190 store <32 x i32> %v141, ptr %v145, align 1, !tbaa !7191 %v147 = add nuw nsw i32 %v92, 1192 %v148 = icmp eq i32 %v147, %v152193 br i1 %v148, label %b4, label %b3194 195b4: ; preds = %b6, %b3196 %v149 = icmp eq i32 %v34, %v20197 br i1 %v149, label %b11, label %b5198 199b5: ; preds = %b4, %b1200 %v150 = phi i32 [ %v34, %b4 ], [ %v17, %b1 ]201 br label %b2202 203b6: ; preds = %b2204 %v151 = add nsw i32 %v11, 127205 %v152 = ashr i32 %v151, 7206 %v153 = icmp slt i32 %v24, %v152207 br i1 %v153, label %b3, label %b4, !prof !3208 209b7: ; preds = %b1210 %v154 = add nsw i32 %v11, 127211 %v155 = ashr i32 %v154, 7212 %v156 = icmp slt i32 %v24, %v155213 br i1 %v156, label %b9, label %b11, !prof !3214 215b8: ; preds = %b9, %b8216 %v157 = phi i32 [ %v221, %b8 ], [ %v24, %b9 ]217 %v158 = mul nsw i32 %v7, %v3218 %v159 = add nsw i32 %v158, %v5219 %v160 = add nsw i32 %v15, %v11220 %v161 = add nsw i32 %v223, -1221 %v162 = mul nsw i32 %v161, %v3222 %v163 = mul nsw i32 %v223, %v3223 %v164 = add nsw i32 %v223, 1224 %v165 = mul nsw i32 %v164, %v3225 %v166 = sub i32 %v160, %v159226 %v167 = add i32 %v166, %v162227 %v168 = add nsw i32 %v167, -129228 %v169 = getelementptr inbounds i8, ptr %v1, i32 %v168229 %v171 = load <32 x i32>, ptr %v169, align 1, !tbaa !4230 %v172 = add nsw i32 %v167, -128231 %v173 = getelementptr inbounds i8, ptr %v1, i32 %v172232 %v175 = load <32 x i32>, ptr %v173, align 1, !tbaa !4233 %v176 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v171, <32 x i32> %v175)234 %v177 = add nsw i32 %v167, -127235 %v178 = getelementptr inbounds i8, ptr %v1, i32 %v177236 %v180 = load <32 x i32>, ptr %v178, align 1, !tbaa !4237 %v181 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v176, <32 x i32> %v180)238 %v182 = add i32 %v166, %v163239 %v183 = add nsw i32 %v182, -129240 %v184 = getelementptr inbounds i8, ptr %v1, i32 %v183241 %v186 = load <32 x i32>, ptr %v184, align 1, !tbaa !4242 %v187 = add nsw i32 %v182, -128243 %v188 = getelementptr inbounds i8, ptr %v1, i32 %v187244 %v190 = load <32 x i32>, ptr %v188, align 1, !tbaa !4245 %v191 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v186, <32 x i32> %v190)246 %v192 = add nsw i32 %v182, -127247 %v193 = getelementptr inbounds i8, ptr %v1, i32 %v192248 %v195 = load <32 x i32>, ptr %v193, align 1, !tbaa !4249 %v196 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v191, <32 x i32> %v195)250 %v197 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v181, <32 x i32> %v196)251 %v198 = add i32 %v166, %v165252 %v199 = add nsw i32 %v198, -129253 %v200 = getelementptr inbounds i8, ptr %v1, i32 %v199254 %v202 = load <32 x i32>, ptr %v200, align 1, !tbaa !4255 %v203 = add nsw i32 %v198, -128256 %v204 = getelementptr inbounds i8, ptr %v1, i32 %v203257 %v206 = load <32 x i32>, ptr %v204, align 1, !tbaa !4258 %v207 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v202, <32 x i32> %v206)259 %v208 = add nsw i32 %v198, -127260 %v209 = getelementptr inbounds i8, ptr %v1, i32 %v208261 %v211 = load <32 x i32>, ptr %v209, align 1, !tbaa !4262 %v212 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v207, <32 x i32> %v211)263 %v213 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %v197, <32 x i32> %v212)264 %v214 = mul nsw i32 %v223, %v13265 %v215 = mul nsw i32 %v17, %v13266 %v216 = add i32 %v11, -128267 %v217 = sub i32 %v216, %v215268 %v218 = add i32 %v217, %v214269 %v219 = getelementptr inbounds i8, ptr %v9, i32 %v218270 store <32 x i32> %v213, ptr %v219, align 1, !tbaa !7271 %v221 = add nuw nsw i32 %v157, 1272 %v222 = icmp eq i32 %v221, %v155273 br i1 %v222, label %b10, label %b8274 275b9: ; preds = %b10, %b7276 %v223 = phi i32 [ %v164, %b10 ], [ %v17, %b7 ]277 br label %b8278 279b10: ; preds = %b8280 %v224 = icmp eq i32 %v164, %v20281 br i1 %v224, label %b11, label %b9282 283b11: ; preds = %b10, %b7, %b4, %b0284 ret i32 0285}286 287; Function Attrs: nounwind readnone288declare <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32>, <32 x i32>) #1289 290; Function Attrs: nounwind291define i32 @f7(ptr noalias nocapture readonly %a0, ptr noalias nocapture readonly %a1) #0 {292b0:293 %v0 = tail call i32 @f6(ptr %a0, ptr %a1) #0294 ret i32 0295}296 297; Function Attrs: nounwind298define i32 @f8(ptr nocapture readonly %a0) #0 {299b0:300 %v1 = load ptr, ptr %a0, align 4301 %v2 = getelementptr ptr, ptr %a0, i32 1302 %v4 = load ptr, ptr %v2, align 4303 %v5 = tail call i32 @f7(ptr %v1, ptr %v4)304 ret i32 0305}306 307attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" }308attributes #1 = { nounwind readnone }309 310!llvm.module.flags = !{!0, !1, !2}311 312!0 = !{i32 2, !"halide_use_soft_float_abi", i32 0}313!1 = !{i32 2, !"halide_mcpu", !"hexagonv60"}314!2 = !{i32 2, !"halide_mattrs", !"+hvxv60,+hvx-length64b"}315!3 = !{!"branch_weights", i32 1073741824, i32 0}316!4 = !{!5, !5, i64 0}317!5 = !{!"input", !6}318!6 = !{!"Halide buffer"}319!7 = !{!8, !8, i64 0}320!8 = !{!"dilate3x3", !6}321