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1; RUN: llc -mtriple=hexagon -mcpu=hexagonv5 < %s | FileCheck %s2; Generate MemOps for V4 and above.3 4define void @memop_unsigned_char_add5(ptr nocapture %p) nounwind {5entry:6; CHECK-LABEL: memop_unsigned_char_add5:7; CHECK: memb(r{{[0-9]+}}+#0) += #58 %0 = load i8, ptr %p, align 19 %conv = zext i8 %0 to i3210 %add = add nsw i32 %conv, 511 %conv1 = trunc i32 %add to i812 store i8 %conv1, ptr %p, align 113 ret void14}15 16define void @memop_unsigned_char_add(ptr nocapture %p, i8 zeroext %x) nounwind {17entry:18; CHECK-LABEL: memop_unsigned_char_add:19; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}}20 %conv = zext i8 %x to i3221 %0 = load i8, ptr %p, align 122 %conv1 = zext i8 %0 to i3223 %add = add nsw i32 %conv1, %conv24 %conv2 = trunc i32 %add to i825 store i8 %conv2, ptr %p, align 126 ret void27}28 29define void @memop_unsigned_char_sub(ptr nocapture %p, i8 zeroext %x) nounwind {30entry:31; CHECK-LABEL: memop_unsigned_char_sub:32; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}}33 %conv = zext i8 %x to i3234 %0 = load i8, ptr %p, align 135 %conv1 = zext i8 %0 to i3236 %sub = sub nsw i32 %conv1, %conv37 %conv2 = trunc i32 %sub to i838 store i8 %conv2, ptr %p, align 139 ret void40}41 42define void @memop_unsigned_char_or(ptr nocapture %p, i8 zeroext %x) nounwind {43entry:44; CHECK-LABEL: memop_unsigned_char_or:45; CHECK: memb(r{{[0-9]+}}+#0) |= r{{[0-9]+}}46 %0 = load i8, ptr %p, align 147 %or3 = or i8 %0, %x48 store i8 %or3, ptr %p, align 149 ret void50}51 52define void @memop_unsigned_char_and(ptr nocapture %p, i8 zeroext %x) nounwind {53entry:54; CHECK-LABEL: memop_unsigned_char_and:55; CHECK: memb(r{{[0-9]+}}+#0) &= r{{[0-9]+}}56 %0 = load i8, ptr %p, align 157 %and3 = and i8 %0, %x58 store i8 %and3, ptr %p, align 159 ret void60}61 62define void @memop_unsigned_char_clrbit(ptr nocapture %p) nounwind {63entry:64; CHECK-LABEL: memop_unsigned_char_clrbit:65; CHECK: memb(r{{[0-9]+}}+#0) = clrbit(#5)66 %0 = load i8, ptr %p, align 167 %conv = zext i8 %0 to i3268 %and = and i32 %conv, 22369 %conv1 = trunc i32 %and to i870 store i8 %conv1, ptr %p, align 171 ret void72}73 74define void @memop_unsigned_char_setbit(ptr nocapture %p) nounwind {75entry:76; CHECK-LABEL: memop_unsigned_char_setbit:77; CHECK: memb(r{{[0-9]+}}+#0) = setbit(#7)78 %0 = load i8, ptr %p, align 179 %conv = zext i8 %0 to i3280 %or = or i32 %conv, 12881 %conv1 = trunc i32 %or to i882 store i8 %conv1, ptr %p, align 183 ret void84}85 86define void @memop_unsigned_char_add5_index(ptr nocapture %p, i32 %i) nounwind {87entry:88; CHECK-LABEL: memop_unsigned_char_add5_index:89; CHECK: memb(r{{[0-9]+}}+#0) += #590 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i91 %0 = load i8, ptr %add.ptr, align 192 %conv = zext i8 %0 to i3293 %add = add nsw i32 %conv, 594 %conv1 = trunc i32 %add to i895 store i8 %conv1, ptr %add.ptr, align 196 ret void97}98 99define void @memop_unsigned_char_add_index(ptr nocapture %p, i32 %i, i8 zeroext %x) nounwind {100entry:101; CHECK-LABEL: memop_unsigned_char_add_index:102; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}}103 %conv = zext i8 %x to i32104 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i105 %0 = load i8, ptr %add.ptr, align 1106 %conv1 = zext i8 %0 to i32107 %add = add nsw i32 %conv1, %conv108 %conv2 = trunc i32 %add to i8109 store i8 %conv2, ptr %add.ptr, align 1110 ret void111}112 113define void @memop_unsigned_char_sub_index(ptr nocapture %p, i32 %i, i8 zeroext %x) nounwind {114entry:115; CHECK-LABEL: memop_unsigned_char_sub_index:116; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}}117 %conv = zext i8 %x to i32118 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i119 %0 = load i8, ptr %add.ptr, align 1120 %conv1 = zext i8 %0 to i32121 %sub = sub nsw i32 %conv1, %conv122 %conv2 = trunc i32 %sub to i8123 store i8 %conv2, ptr %add.ptr, align 1124 ret void125}126 127define void @memop_unsigned_char_or_index(ptr nocapture %p, i32 %i, i8 zeroext %x) nounwind {128entry:129; CHECK-LABEL: memop_unsigned_char_or_index:130; CHECK: memb(r{{[0-9]+}}+#0) |= r{{[0-9]+}}131 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i132 %0 = load i8, ptr %add.ptr, align 1133 %or3 = or i8 %0, %x134 store i8 %or3, ptr %add.ptr, align 1135 ret void136}137 138define void @memop_unsigned_char_and_index(ptr nocapture %p, i32 %i, i8 zeroext %x) nounwind {139entry:140; CHECK-LABEL: memop_unsigned_char_and_index:141; CHECK: memb(r{{[0-9]+}}+#0) &= r{{[0-9]+}}142 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i143 %0 = load i8, ptr %add.ptr, align 1144 %and3 = and i8 %0, %x145 store i8 %and3, ptr %add.ptr, align 1146 ret void147}148 149define void @memop_unsigned_char_clrbit_index(ptr nocapture %p, i32 %i) nounwind {150entry:151; CHECK-LABEL: memop_unsigned_char_clrbit_index:152; CHECK: memb(r{{[0-9]+}}+#0) = clrbit(#5)153 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i154 %0 = load i8, ptr %add.ptr, align 1155 %conv = zext i8 %0 to i32156 %and = and i32 %conv, 223157 %conv1 = trunc i32 %and to i8158 store i8 %conv1, ptr %add.ptr, align 1159 ret void160}161 162define void @memop_unsigned_char_setbit_index(ptr nocapture %p, i32 %i) nounwind {163entry:164; CHECK-LABEL: memop_unsigned_char_setbit_index:165; CHECK: memb(r{{[0-9]+}}+#0) = setbit(#7)166 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i167 %0 = load i8, ptr %add.ptr, align 1168 %conv = zext i8 %0 to i32169 %or = or i32 %conv, 128170 %conv1 = trunc i32 %or to i8171 store i8 %conv1, ptr %add.ptr, align 1172 ret void173}174 175define void @memop_unsigned_char_add5_index5(ptr nocapture %p) nounwind {176entry:177; CHECK-LABEL: memop_unsigned_char_add5_index5:178; CHECK: memb(r{{[0-9]+}}+#5) += #5179 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5180 %0 = load i8, ptr %add.ptr, align 1181 %conv = zext i8 %0 to i32182 %add = add nsw i32 %conv, 5183 %conv1 = trunc i32 %add to i8184 store i8 %conv1, ptr %add.ptr, align 1185 ret void186}187 188define void @memop_unsigned_char_add_index5(ptr nocapture %p, i8 zeroext %x) nounwind {189entry:190; CHECK-LABEL: memop_unsigned_char_add_index5:191; CHECK: memb(r{{[0-9]+}}+#5) += r{{[0-9]+}}192 %conv = zext i8 %x to i32193 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5194 %0 = load i8, ptr %add.ptr, align 1195 %conv1 = zext i8 %0 to i32196 %add = add nsw i32 %conv1, %conv197 %conv2 = trunc i32 %add to i8198 store i8 %conv2, ptr %add.ptr, align 1199 ret void200}201 202define void @memop_unsigned_char_sub_index5(ptr nocapture %p, i8 zeroext %x) nounwind {203entry:204; CHECK-LABEL: memop_unsigned_char_sub_index5:205; CHECK: memb(r{{[0-9]+}}+#5) -= r{{[0-9]+}}206 %conv = zext i8 %x to i32207 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5208 %0 = load i8, ptr %add.ptr, align 1209 %conv1 = zext i8 %0 to i32210 %sub = sub nsw i32 %conv1, %conv211 %conv2 = trunc i32 %sub to i8212 store i8 %conv2, ptr %add.ptr, align 1213 ret void214}215 216define void @memop_unsigned_char_or_index5(ptr nocapture %p, i8 zeroext %x) nounwind {217entry:218; CHECK-LABEL: memop_unsigned_char_or_index5:219; CHECK: memb(r{{[0-9]+}}+#5) |= r{{[0-9]+}}220 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5221 %0 = load i8, ptr %add.ptr, align 1222 %or3 = or i8 %0, %x223 store i8 %or3, ptr %add.ptr, align 1224 ret void225}226 227define void @memop_unsigned_char_and_index5(ptr nocapture %p, i8 zeroext %x) nounwind {228entry:229; CHECK-LABEL: memop_unsigned_char_and_index5:230; CHECK: memb(r{{[0-9]+}}+#5) &= r{{[0-9]+}}231 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5232 %0 = load i8, ptr %add.ptr, align 1233 %and3 = and i8 %0, %x234 store i8 %and3, ptr %add.ptr, align 1235 ret void236}237 238define void @memop_unsigned_char_clrbit_index5(ptr nocapture %p) nounwind {239entry:240; CHECK-LABEL: memop_unsigned_char_clrbit_index5:241; CHECK: memb(r{{[0-9]+}}+#5) = clrbit(#5)242 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5243 %0 = load i8, ptr %add.ptr, align 1244 %conv = zext i8 %0 to i32245 %and = and i32 %conv, 223246 %conv1 = trunc i32 %and to i8247 store i8 %conv1, ptr %add.ptr, align 1248 ret void249}250 251define void @memop_unsigned_char_setbit_index5(ptr nocapture %p) nounwind {252entry:253; CHECK-LABEL: memop_unsigned_char_setbit_index5:254; CHECK: memb(r{{[0-9]+}}+#5) = setbit(#7)255 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5256 %0 = load i8, ptr %add.ptr, align 1257 %conv = zext i8 %0 to i32258 %or = or i32 %conv, 128259 %conv1 = trunc i32 %or to i8260 store i8 %conv1, ptr %add.ptr, align 1261 ret void262}263 264define void @memop_signed_char_add5(ptr nocapture %p) nounwind {265entry:266; CHECK-LABEL: memop_signed_char_add5:267; CHECK: memb(r{{[0-9]+}}+#0) += #5268 %0 = load i8, ptr %p, align 1269 %conv2 = zext i8 %0 to i32270 %add = add nsw i32 %conv2, 5271 %conv1 = trunc i32 %add to i8272 store i8 %conv1, ptr %p, align 1273 ret void274}275 276define void @memop_signed_char_add(ptr nocapture %p, i8 signext %x) nounwind {277entry:278; CHECK-LABEL: memop_signed_char_add:279; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}}280 %conv4 = zext i8 %x to i32281 %0 = load i8, ptr %p, align 1282 %conv13 = zext i8 %0 to i32283 %add = add nsw i32 %conv13, %conv4284 %conv2 = trunc i32 %add to i8285 store i8 %conv2, ptr %p, align 1286 ret void287}288 289define void @memop_signed_char_sub(ptr nocapture %p, i8 signext %x) nounwind {290entry:291; CHECK-LABEL: memop_signed_char_sub:292; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}}293 %conv4 = zext i8 %x to i32294 %0 = load i8, ptr %p, align 1295 %conv13 = zext i8 %0 to i32296 %sub = sub nsw i32 %conv13, %conv4297 %conv2 = trunc i32 %sub to i8298 store i8 %conv2, ptr %p, align 1299 ret void300}301 302define void @memop_signed_char_or(ptr nocapture %p, i8 signext %x) nounwind {303entry:304; CHECK-LABEL: memop_signed_char_or:305; CHECK: memb(r{{[0-9]+}}+#0) |= r{{[0-9]+}}306 %0 = load i8, ptr %p, align 1307 %or3 = or i8 %0, %x308 store i8 %or3, ptr %p, align 1309 ret void310}311 312define void @memop_signed_char_and(ptr nocapture %p, i8 signext %x) nounwind {313entry:314; CHECK-LABEL: memop_signed_char_and:315; CHECK: memb(r{{[0-9]+}}+#0) &= r{{[0-9]+}}316 %0 = load i8, ptr %p, align 1317 %and3 = and i8 %0, %x318 store i8 %and3, ptr %p, align 1319 ret void320}321 322define void @memop_signed_char_clrbit(ptr nocapture %p) nounwind {323entry:324; CHECK-LABEL: memop_signed_char_clrbit:325; CHECK: memb(r{{[0-9]+}}+#0) = clrbit(#5)326 %0 = load i8, ptr %p, align 1327 %conv2 = zext i8 %0 to i32328 %and = and i32 %conv2, 223329 %conv1 = trunc i32 %and to i8330 store i8 %conv1, ptr %p, align 1331 ret void332}333 334define void @memop_signed_char_setbit(ptr nocapture %p) nounwind {335entry:336; CHECK-LABEL: memop_signed_char_setbit:337; CHECK: memb(r{{[0-9]+}}+#0) = setbit(#7)338 %0 = load i8, ptr %p, align 1339 %conv2 = zext i8 %0 to i32340 %or = or i32 %conv2, 128341 %conv1 = trunc i32 %or to i8342 store i8 %conv1, ptr %p, align 1343 ret void344}345 346define void @memop_signed_char_add5_index(ptr nocapture %p, i32 %i) nounwind {347entry:348; CHECK-LABEL: memop_signed_char_add5_index:349; CHECK: memb(r{{[0-9]+}}+#0) += #5350 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i351 %0 = load i8, ptr %add.ptr, align 1352 %conv2 = zext i8 %0 to i32353 %add = add nsw i32 %conv2, 5354 %conv1 = trunc i32 %add to i8355 store i8 %conv1, ptr %add.ptr, align 1356 ret void357}358 359define void @memop_signed_char_add_index(ptr nocapture %p, i32 %i, i8 signext %x) nounwind {360entry:361; CHECK-LABEL: memop_signed_char_add_index:362; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}}363 %conv4 = zext i8 %x to i32364 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i365 %0 = load i8, ptr %add.ptr, align 1366 %conv13 = zext i8 %0 to i32367 %add = add nsw i32 %conv13, %conv4368 %conv2 = trunc i32 %add to i8369 store i8 %conv2, ptr %add.ptr, align 1370 ret void371}372 373define void @memop_signed_char_sub_index(ptr nocapture %p, i32 %i, i8 signext %x) nounwind {374entry:375; CHECK-LABEL: memop_signed_char_sub_index:376; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}}377 %conv4 = zext i8 %x to i32378 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i379 %0 = load i8, ptr %add.ptr, align 1380 %conv13 = zext i8 %0 to i32381 %sub = sub nsw i32 %conv13, %conv4382 %conv2 = trunc i32 %sub to i8383 store i8 %conv2, ptr %add.ptr, align 1384 ret void385}386 387define void @memop_signed_char_or_index(ptr nocapture %p, i32 %i, i8 signext %x) nounwind {388entry:389; CHECK-LABEL: memop_signed_char_or_index:390; CHECK: memb(r{{[0-9]+}}+#0) |= r{{[0-9]+}}391 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i392 %0 = load i8, ptr %add.ptr, align 1393 %or3 = or i8 %0, %x394 store i8 %or3, ptr %add.ptr, align 1395 ret void396}397 398define void @memop_signed_char_and_index(ptr nocapture %p, i32 %i, i8 signext %x) nounwind {399entry:400; CHECK-LABEL: memop_signed_char_and_index:401; CHECK: memb(r{{[0-9]+}}+#0) &= r{{[0-9]+}}402 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i403 %0 = load i8, ptr %add.ptr, align 1404 %and3 = and i8 %0, %x405 store i8 %and3, ptr %add.ptr, align 1406 ret void407}408 409define void @memop_signed_char_clrbit_index(ptr nocapture %p, i32 %i) nounwind {410entry:411; CHECK-LABEL: memop_signed_char_clrbit_index:412; CHECK: memb(r{{[0-9]+}}+#0) = clrbit(#5)413 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i414 %0 = load i8, ptr %add.ptr, align 1415 %conv2 = zext i8 %0 to i32416 %and = and i32 %conv2, 223417 %conv1 = trunc i32 %and to i8418 store i8 %conv1, ptr %add.ptr, align 1419 ret void420}421 422define void @memop_signed_char_setbit_index(ptr nocapture %p, i32 %i) nounwind {423entry:424; CHECK-LABEL: memop_signed_char_setbit_index:425; CHECK: memb(r{{[0-9]+}}+#0) = setbit(#7)426 %add.ptr = getelementptr inbounds i8, ptr %p, i32 %i427 %0 = load i8, ptr %add.ptr, align 1428 %conv2 = zext i8 %0 to i32429 %or = or i32 %conv2, 128430 %conv1 = trunc i32 %or to i8431 store i8 %conv1, ptr %add.ptr, align 1432 ret void433}434 435define void @memop_signed_char_add5_index5(ptr nocapture %p) nounwind {436entry:437; CHECK-LABEL: memop_signed_char_add5_index5:438; CHECK: memb(r{{[0-9]+}}+#5) += #5439 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5440 %0 = load i8, ptr %add.ptr, align 1441 %conv2 = zext i8 %0 to i32442 %add = add nsw i32 %conv2, 5443 %conv1 = trunc i32 %add to i8444 store i8 %conv1, ptr %add.ptr, align 1445 ret void446}447 448define void @memop_signed_char_add_index5(ptr nocapture %p, i8 signext %x) nounwind {449entry:450; CHECK-LABEL: memop_signed_char_add_index5:451; CHECK: memb(r{{[0-9]+}}+#5) += r{{[0-9]+}}452 %conv4 = zext i8 %x to i32453 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5454 %0 = load i8, ptr %add.ptr, align 1455 %conv13 = zext i8 %0 to i32456 %add = add nsw i32 %conv13, %conv4457 %conv2 = trunc i32 %add to i8458 store i8 %conv2, ptr %add.ptr, align 1459 ret void460}461 462define void @memop_signed_char_sub_index5(ptr nocapture %p, i8 signext %x) nounwind {463entry:464; CHECK-LABEL: memop_signed_char_sub_index5:465; CHECK: memb(r{{[0-9]+}}+#5) -= r{{[0-9]+}}466 %conv4 = zext i8 %x to i32467 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5468 %0 = load i8, ptr %add.ptr, align 1469 %conv13 = zext i8 %0 to i32470 %sub = sub nsw i32 %conv13, %conv4471 %conv2 = trunc i32 %sub to i8472 store i8 %conv2, ptr %add.ptr, align 1473 ret void474}475 476define void @memop_signed_char_or_index5(ptr nocapture %p, i8 signext %x) nounwind {477entry:478; CHECK-LABEL: memop_signed_char_or_index5:479; CHECK: memb(r{{[0-9]+}}+#5) |= r{{[0-9]+}}480 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5481 %0 = load i8, ptr %add.ptr, align 1482 %or3 = or i8 %0, %x483 store i8 %or3, ptr %add.ptr, align 1484 ret void485}486 487define void @memop_signed_char_and_index5(ptr nocapture %p, i8 signext %x) nounwind {488entry:489; CHECK-LABEL: memop_signed_char_and_index5:490; CHECK: memb(r{{[0-9]+}}+#5) &= r{{[0-9]+}}491 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5492 %0 = load i8, ptr %add.ptr, align 1493 %and3 = and i8 %0, %x494 store i8 %and3, ptr %add.ptr, align 1495 ret void496}497 498define void @memop_signed_char_clrbit_index5(ptr nocapture %p) nounwind {499entry:500; CHECK-LABEL: memop_signed_char_clrbit_index5:501; CHECK: memb(r{{[0-9]+}}+#5) = clrbit(#5)502 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5503 %0 = load i8, ptr %add.ptr, align 1504 %conv2 = zext i8 %0 to i32505 %and = and i32 %conv2, 223506 %conv1 = trunc i32 %and to i8507 store i8 %conv1, ptr %add.ptr, align 1508 ret void509}510 511define void @memop_signed_char_setbit_index5(ptr nocapture %p) nounwind {512entry:513; CHECK-LABEL: memop_signed_char_setbit_index5:514; CHECK: memb(r{{[0-9]+}}+#5) = setbit(#7)515 %add.ptr = getelementptr inbounds i8, ptr %p, i32 5516 %0 = load i8, ptr %add.ptr, align 1517 %conv2 = zext i8 %0 to i32518 %or = or i32 %conv2, 128519 %conv1 = trunc i32 %or to i8520 store i8 %conv1, ptr %add.ptr, align 1521 ret void522}523 524define void @memop_unsigned_short_add5(ptr nocapture %p) nounwind {525entry:526; CHECK-LABEL: memop_unsigned_short_add5:527; CHECK: memh(r{{[0-9]+}}+#0) += #5528 %0 = load i16, ptr %p, align 2529 %conv = zext i16 %0 to i32530 %add = add nsw i32 %conv, 5531 %conv1 = trunc i32 %add to i16532 store i16 %conv1, ptr %p, align 2533 ret void534}535 536define void @memop_unsigned_short_add(ptr nocapture %p, i16 zeroext %x) nounwind {537entry:538; CHECK-LABEL: memop_unsigned_short_add:539; CHECK: memh(r{{[0-9]+}}+#0) += r{{[0-9]+}}540 %conv = zext i16 %x to i32541 %0 = load i16, ptr %p, align 2542 %conv1 = zext i16 %0 to i32543 %add = add nsw i32 %conv1, %conv544 %conv2 = trunc i32 %add to i16545 store i16 %conv2, ptr %p, align 2546 ret void547}548 549define void @memop_unsigned_short_sub(ptr nocapture %p, i16 zeroext %x) nounwind {550entry:551; CHECK-LABEL: memop_unsigned_short_sub:552; CHECK: memh(r{{[0-9]+}}+#0) -= r{{[0-9]+}}553 %conv = zext i16 %x to i32554 %0 = load i16, ptr %p, align 2555 %conv1 = zext i16 %0 to i32556 %sub = sub nsw i32 %conv1, %conv557 %conv2 = trunc i32 %sub to i16558 store i16 %conv2, ptr %p, align 2559 ret void560}561 562define void @memop_unsigned_short_or(ptr nocapture %p, i16 zeroext %x) nounwind {563entry:564; CHECK-LABEL: memop_unsigned_short_or:565; CHECK: memh(r{{[0-9]+}}+#0) |= r{{[0-9]+}}566 %0 = load i16, ptr %p, align 2567 %or3 = or i16 %0, %x568 store i16 %or3, ptr %p, align 2569 ret void570}571 572define void @memop_unsigned_short_and(ptr nocapture %p, i16 zeroext %x) nounwind {573entry:574; CHECK-LABEL: memop_unsigned_short_and:575; CHECK: memh(r{{[0-9]+}}+#0) &= r{{[0-9]+}}576 %0 = load i16, ptr %p, align 2577 %and3 = and i16 %0, %x578 store i16 %and3, ptr %p, align 2579 ret void580}581 582define void @memop_unsigned_short_clrbit(ptr nocapture %p) nounwind {583entry:584; CHECK-LABEL: memop_unsigned_short_clrbit:585; CHECK: memh(r{{[0-9]+}}+#0) = clrbit(#5)586 %0 = load i16, ptr %p, align 2587 %conv = zext i16 %0 to i32588 %and = and i32 %conv, 65503589 %conv1 = trunc i32 %and to i16590 store i16 %conv1, ptr %p, align 2591 ret void592}593 594define void @memop_unsigned_short_setbit(ptr nocapture %p) nounwind {595entry:596; CHECK-LABEL: memop_unsigned_short_setbit:597; CHECK: memh(r{{[0-9]+}}+#0) = setbit(#7)598 %0 = load i16, ptr %p, align 2599 %conv = zext i16 %0 to i32600 %or = or i32 %conv, 128601 %conv1 = trunc i32 %or to i16602 store i16 %conv1, ptr %p, align 2603 ret void604}605 606define void @memop_unsigned_short_add5_index(ptr nocapture %p, i32 %i) nounwind {607entry:608; CHECK-LABEL: memop_unsigned_short_add5_index:609; CHECK: memh(r{{[0-9]+}}+#0) += #5610 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i611 %0 = load i16, ptr %add.ptr, align 2612 %conv = zext i16 %0 to i32613 %add = add nsw i32 %conv, 5614 %conv1 = trunc i32 %add to i16615 store i16 %conv1, ptr %add.ptr, align 2616 ret void617}618 619define void @memop_unsigned_short_add_index(ptr nocapture %p, i32 %i, i16 zeroext %x) nounwind {620entry:621; CHECK-LABEL: memop_unsigned_short_add_index:622; CHECK: memh(r{{[0-9]+}}+#0) += r{{[0-9]+}}623 %conv = zext i16 %x to i32624 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i625 %0 = load i16, ptr %add.ptr, align 2626 %conv1 = zext i16 %0 to i32627 %add = add nsw i32 %conv1, %conv628 %conv2 = trunc i32 %add to i16629 store i16 %conv2, ptr %add.ptr, align 2630 ret void631}632 633define void @memop_unsigned_short_sub_index(ptr nocapture %p, i32 %i, i16 zeroext %x) nounwind {634entry:635; CHECK-LABEL: memop_unsigned_short_sub_index:636; CHECK: memh(r{{[0-9]+}}+#0) -= r{{[0-9]+}}637 %conv = zext i16 %x to i32638 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i639 %0 = load i16, ptr %add.ptr, align 2640 %conv1 = zext i16 %0 to i32641 %sub = sub nsw i32 %conv1, %conv642 %conv2 = trunc i32 %sub to i16643 store i16 %conv2, ptr %add.ptr, align 2644 ret void645}646 647define void @memop_unsigned_short_or_index(ptr nocapture %p, i32 %i, i16 zeroext %x) nounwind {648entry:649; CHECK-LABEL: memop_unsigned_short_or_index:650; CHECK: memh(r{{[0-9]+}}+#0) |= r{{[0-9]+}}651 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i652 %0 = load i16, ptr %add.ptr, align 2653 %or3 = or i16 %0, %x654 store i16 %or3, ptr %add.ptr, align 2655 ret void656}657 658define void @memop_unsigned_short_and_index(ptr nocapture %p, i32 %i, i16 zeroext %x) nounwind {659entry:660; CHECK-LABEL: memop_unsigned_short_and_index:661; CHECK: memh(r{{[0-9]+}}+#0) &= r{{[0-9]+}}662 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i663 %0 = load i16, ptr %add.ptr, align 2664 %and3 = and i16 %0, %x665 store i16 %and3, ptr %add.ptr, align 2666 ret void667}668 669define void @memop_unsigned_short_clrbit_index(ptr nocapture %p, i32 %i) nounwind {670entry:671; CHECK-LABEL: memop_unsigned_short_clrbit_index:672; CHECK: memh(r{{[0-9]+}}+#0) = clrbit(#5)673 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i674 %0 = load i16, ptr %add.ptr, align 2675 %conv = zext i16 %0 to i32676 %and = and i32 %conv, 65503677 %conv1 = trunc i32 %and to i16678 store i16 %conv1, ptr %add.ptr, align 2679 ret void680}681 682define void @memop_unsigned_short_setbit_index(ptr nocapture %p, i32 %i) nounwind {683entry:684; CHECK-LABEL: memop_unsigned_short_setbit_index:685; CHECK: memh(r{{[0-9]+}}+#0) = setbit(#7)686 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i687 %0 = load i16, ptr %add.ptr, align 2688 %conv = zext i16 %0 to i32689 %or = or i32 %conv, 128690 %conv1 = trunc i32 %or to i16691 store i16 %conv1, ptr %add.ptr, align 2692 ret void693}694 695define void @memop_unsigned_short_add5_index5(ptr nocapture %p) nounwind {696entry:697; CHECK-LABEL: memop_unsigned_short_add5_index5:698; CHECK: memh(r{{[0-9]+}}+#10) += #5699 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5700 %0 = load i16, ptr %add.ptr, align 2701 %conv = zext i16 %0 to i32702 %add = add nsw i32 %conv, 5703 %conv1 = trunc i32 %add to i16704 store i16 %conv1, ptr %add.ptr, align 2705 ret void706}707 708define void @memop_unsigned_short_add_index5(ptr nocapture %p, i16 zeroext %x) nounwind {709entry:710; CHECK-LABEL: memop_unsigned_short_add_index5:711; CHECK: memh(r{{[0-9]+}}+#10) += r{{[0-9]+}}712 %conv = zext i16 %x to i32713 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5714 %0 = load i16, ptr %add.ptr, align 2715 %conv1 = zext i16 %0 to i32716 %add = add nsw i32 %conv1, %conv717 %conv2 = trunc i32 %add to i16718 store i16 %conv2, ptr %add.ptr, align 2719 ret void720}721 722define void @memop_unsigned_short_sub_index5(ptr nocapture %p, i16 zeroext %x) nounwind {723entry:724; CHECK-LABEL: memop_unsigned_short_sub_index5:725; CHECK: memh(r{{[0-9]+}}+#10) -= r{{[0-9]+}}726 %conv = zext i16 %x to i32727 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5728 %0 = load i16, ptr %add.ptr, align 2729 %conv1 = zext i16 %0 to i32730 %sub = sub nsw i32 %conv1, %conv731 %conv2 = trunc i32 %sub to i16732 store i16 %conv2, ptr %add.ptr, align 2733 ret void734}735 736define void @memop_unsigned_short_or_index5(ptr nocapture %p, i16 zeroext %x) nounwind {737entry:738; CHECK-LABEL: memop_unsigned_short_or_index5:739; CHECK: memh(r{{[0-9]+}}+#10) |= r{{[0-9]+}}740 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5741 %0 = load i16, ptr %add.ptr, align 2742 %or3 = or i16 %0, %x743 store i16 %or3, ptr %add.ptr, align 2744 ret void745}746 747define void @memop_unsigned_short_and_index5(ptr nocapture %p, i16 zeroext %x) nounwind {748entry:749; CHECK-LABEL: memop_unsigned_short_and_index5:750; CHECK: memh(r{{[0-9]+}}+#10) &= r{{[0-9]+}}751 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5752 %0 = load i16, ptr %add.ptr, align 2753 %and3 = and i16 %0, %x754 store i16 %and3, ptr %add.ptr, align 2755 ret void756}757 758define void @memop_unsigned_short_clrbit_index5(ptr nocapture %p) nounwind {759entry:760; CHECK-LABEL: memop_unsigned_short_clrbit_index5:761; CHECK: memh(r{{[0-9]+}}+#10) = clrbit(#5)762 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5763 %0 = load i16, ptr %add.ptr, align 2764 %conv = zext i16 %0 to i32765 %and = and i32 %conv, 65503766 %conv1 = trunc i32 %and to i16767 store i16 %conv1, ptr %add.ptr, align 2768 ret void769}770 771define void @memop_unsigned_short_setbit_index5(ptr nocapture %p) nounwind {772entry:773; CHECK-LABEL: memop_unsigned_short_setbit_index5:774; CHECK: memh(r{{[0-9]+}}+#10) = setbit(#7)775 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5776 %0 = load i16, ptr %add.ptr, align 2777 %conv = zext i16 %0 to i32778 %or = or i32 %conv, 128779 %conv1 = trunc i32 %or to i16780 store i16 %conv1, ptr %add.ptr, align 2781 ret void782}783 784define void @memop_signed_short_add5(ptr nocapture %p) nounwind {785entry:786; CHECK-LABEL: memop_signed_short_add5:787; CHECK: memh(r{{[0-9]+}}+#0) += #5788 %0 = load i16, ptr %p, align 2789 %conv2 = zext i16 %0 to i32790 %add = add nsw i32 %conv2, 5791 %conv1 = trunc i32 %add to i16792 store i16 %conv1, ptr %p, align 2793 ret void794}795 796define void @memop_signed_short_add(ptr nocapture %p, i16 signext %x) nounwind {797entry:798; CHECK-LABEL: memop_signed_short_add:799; CHECK: memh(r{{[0-9]+}}+#0) += r{{[0-9]+}}800 %conv4 = zext i16 %x to i32801 %0 = load i16, ptr %p, align 2802 %conv13 = zext i16 %0 to i32803 %add = add nsw i32 %conv13, %conv4804 %conv2 = trunc i32 %add to i16805 store i16 %conv2, ptr %p, align 2806 ret void807}808 809define void @memop_signed_short_sub(ptr nocapture %p, i16 signext %x) nounwind {810entry:811; CHECK-LABEL: memop_signed_short_sub:812; CHECK: memh(r{{[0-9]+}}+#0) -= r{{[0-9]+}}813 %conv4 = zext i16 %x to i32814 %0 = load i16, ptr %p, align 2815 %conv13 = zext i16 %0 to i32816 %sub = sub nsw i32 %conv13, %conv4817 %conv2 = trunc i32 %sub to i16818 store i16 %conv2, ptr %p, align 2819 ret void820}821 822define void @memop_signed_short_or(ptr nocapture %p, i16 signext %x) nounwind {823entry:824; CHECK-LABEL: memop_signed_short_or:825; CHECK: memh(r{{[0-9]+}}+#0) |= r{{[0-9]+}}826 %0 = load i16, ptr %p, align 2827 %or3 = or i16 %0, %x828 store i16 %or3, ptr %p, align 2829 ret void830}831 832define void @memop_signed_short_and(ptr nocapture %p, i16 signext %x) nounwind {833entry:834; CHECK-LABEL: memop_signed_short_and:835; CHECK: memh(r{{[0-9]+}}+#0) &= r{{[0-9]+}}836 %0 = load i16, ptr %p, align 2837 %and3 = and i16 %0, %x838 store i16 %and3, ptr %p, align 2839 ret void840}841 842define void @memop_signed_short_clrbit(ptr nocapture %p) nounwind {843entry:844; CHECK-LABEL: memop_signed_short_clrbit:845; CHECK: memh(r{{[0-9]+}}+#0) = clrbit(#5)846 %0 = load i16, ptr %p, align 2847 %conv2 = zext i16 %0 to i32848 %and = and i32 %conv2, 65503849 %conv1 = trunc i32 %and to i16850 store i16 %conv1, ptr %p, align 2851 ret void852}853 854define void @memop_signed_short_setbit(ptr nocapture %p) nounwind {855entry:856; CHECK-LABEL: memop_signed_short_setbit:857; CHECK: memh(r{{[0-9]+}}+#0) = setbit(#7)858 %0 = load i16, ptr %p, align 2859 %conv2 = zext i16 %0 to i32860 %or = or i32 %conv2, 128861 %conv1 = trunc i32 %or to i16862 store i16 %conv1, ptr %p, align 2863 ret void864}865 866define void @memop_signed_short_add5_index(ptr nocapture %p, i32 %i) nounwind {867entry:868; CHECK-LABEL: memop_signed_short_add5_index:869; CHECK: memh(r{{[0-9]+}}+#0) += #5870 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i871 %0 = load i16, ptr %add.ptr, align 2872 %conv2 = zext i16 %0 to i32873 %add = add nsw i32 %conv2, 5874 %conv1 = trunc i32 %add to i16875 store i16 %conv1, ptr %add.ptr, align 2876 ret void877}878 879define void @memop_signed_short_add_index(ptr nocapture %p, i32 %i, i16 signext %x) nounwind {880entry:881; CHECK-LABEL: memop_signed_short_add_index:882; CHECK: memh(r{{[0-9]+}}+#0) += r{{[0-9]+}}883 %conv4 = zext i16 %x to i32884 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i885 %0 = load i16, ptr %add.ptr, align 2886 %conv13 = zext i16 %0 to i32887 %add = add nsw i32 %conv13, %conv4888 %conv2 = trunc i32 %add to i16889 store i16 %conv2, ptr %add.ptr, align 2890 ret void891}892 893define void @memop_signed_short_sub_index(ptr nocapture %p, i32 %i, i16 signext %x) nounwind {894entry:895; CHECK-LABEL: memop_signed_short_sub_index:896; CHECK: memh(r{{[0-9]+}}+#0) -= r{{[0-9]+}}897 %conv4 = zext i16 %x to i32898 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i899 %0 = load i16, ptr %add.ptr, align 2900 %conv13 = zext i16 %0 to i32901 %sub = sub nsw i32 %conv13, %conv4902 %conv2 = trunc i32 %sub to i16903 store i16 %conv2, ptr %add.ptr, align 2904 ret void905}906 907define void @memop_signed_short_or_index(ptr nocapture %p, i32 %i, i16 signext %x) nounwind {908entry:909; CHECK-LABEL: memop_signed_short_or_index:910; CHECK: memh(r{{[0-9]+}}+#0) |= r{{[0-9]+}}911 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i912 %0 = load i16, ptr %add.ptr, align 2913 %or3 = or i16 %0, %x914 store i16 %or3, ptr %add.ptr, align 2915 ret void916}917 918define void @memop_signed_short_and_index(ptr nocapture %p, i32 %i, i16 signext %x) nounwind {919entry:920; CHECK-LABEL: memop_signed_short_and_index:921; CHECK: memh(r{{[0-9]+}}+#0) &= r{{[0-9]+}}922 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i923 %0 = load i16, ptr %add.ptr, align 2924 %and3 = and i16 %0, %x925 store i16 %and3, ptr %add.ptr, align 2926 ret void927}928 929define void @memop_signed_short_clrbit_index(ptr nocapture %p, i32 %i) nounwind {930entry:931; CHECK-LABEL: memop_signed_short_clrbit_index:932; CHECK: memh(r{{[0-9]+}}+#0) = clrbit(#5)933 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i934 %0 = load i16, ptr %add.ptr, align 2935 %conv2 = zext i16 %0 to i32936 %and = and i32 %conv2, 65503937 %conv1 = trunc i32 %and to i16938 store i16 %conv1, ptr %add.ptr, align 2939 ret void940}941 942define void @memop_signed_short_setbit_index(ptr nocapture %p, i32 %i) nounwind {943entry:944; CHECK-LABEL: memop_signed_short_setbit_index:945; CHECK: memh(r{{[0-9]+}}+#0) = setbit(#7)946 %add.ptr = getelementptr inbounds i16, ptr %p, i32 %i947 %0 = load i16, ptr %add.ptr, align 2948 %conv2 = zext i16 %0 to i32949 %or = or i32 %conv2, 128950 %conv1 = trunc i32 %or to i16951 store i16 %conv1, ptr %add.ptr, align 2952 ret void953}954 955define void @memop_signed_short_add5_index5(ptr nocapture %p) nounwind {956entry:957; CHECK-LABEL: memop_signed_short_add5_index5:958; CHECK: memh(r{{[0-9]+}}+#10) += #5959 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5960 %0 = load i16, ptr %add.ptr, align 2961 %conv2 = zext i16 %0 to i32962 %add = add nsw i32 %conv2, 5963 %conv1 = trunc i32 %add to i16964 store i16 %conv1, ptr %add.ptr, align 2965 ret void966}967 968define void @memop_signed_short_add_index5(ptr nocapture %p, i16 signext %x) nounwind {969entry:970; CHECK-LABEL: memop_signed_short_add_index5:971; CHECK: memh(r{{[0-9]+}}+#10) += r{{[0-9]+}}972 %conv4 = zext i16 %x to i32973 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5974 %0 = load i16, ptr %add.ptr, align 2975 %conv13 = zext i16 %0 to i32976 %add = add nsw i32 %conv13, %conv4977 %conv2 = trunc i32 %add to i16978 store i16 %conv2, ptr %add.ptr, align 2979 ret void980}981 982define void @memop_signed_short_sub_index5(ptr nocapture %p, i16 signext %x) nounwind {983entry:984; CHECK-LABEL: memop_signed_short_sub_index5:985; CHECK: memh(r{{[0-9]+}}+#10) -= r{{[0-9]+}}986 %conv4 = zext i16 %x to i32987 %add.ptr = getelementptr inbounds i16, ptr %p, i32 5988 %0 = load i16, ptr %add.ptr, align 2989 %conv13 = zext i16 %0 to i32990 %sub = sub nsw i32 %conv13, %conv4991 %conv2 = trunc i32 %sub to i16992 store i16 %conv2, ptr %add.ptr, align 2993 ret void994}995 996define void @memop_signed_short_or_index5(ptr nocapture %p, i16 signext %x) nounwind {997entry:998; CHECK-LABEL: memop_signed_short_or_index5:999; CHECK: memh(r{{[0-9]+}}+#10) |= r{{[0-9]+}}1000 %add.ptr = getelementptr inbounds i16, ptr %p, i32 51001 %0 = load i16, ptr %add.ptr, align 21002 %or3 = or i16 %0, %x1003 store i16 %or3, ptr %add.ptr, align 21004 ret void1005}1006 1007define void @memop_signed_short_and_index5(ptr nocapture %p, i16 signext %x) nounwind {1008entry:1009; CHECK-LABEL: memop_signed_short_and_index5:1010; CHECK: memh(r{{[0-9]+}}+#10) &= r{{[0-9]+}}1011 %add.ptr = getelementptr inbounds i16, ptr %p, i32 51012 %0 = load i16, ptr %add.ptr, align 21013 %and3 = and i16 %0, %x1014 store i16 %and3, ptr %add.ptr, align 21015 ret void1016}1017 1018define void @memop_signed_short_clrbit_index5(ptr nocapture %p) nounwind {1019entry:1020; CHECK-LABEL: memop_signed_short_clrbit_index5:1021; CHECK: memh(r{{[0-9]+}}+#10) = clrbit(#5)1022 %add.ptr = getelementptr inbounds i16, ptr %p, i32 51023 %0 = load i16, ptr %add.ptr, align 21024 %conv2 = zext i16 %0 to i321025 %and = and i32 %conv2, 655031026 %conv1 = trunc i32 %and to i161027 store i16 %conv1, ptr %add.ptr, align 21028 ret void1029}1030 1031define void @memop_signed_short_setbit_index5(ptr nocapture %p) nounwind {1032entry:1033; CHECK-LABEL: memop_signed_short_setbit_index5:1034; CHECK: memh(r{{[0-9]+}}+#10) = setbit(#7)1035 %add.ptr = getelementptr inbounds i16, ptr %p, i32 51036 %0 = load i16, ptr %add.ptr, align 21037 %conv2 = zext i16 %0 to i321038 %or = or i32 %conv2, 1281039 %conv1 = trunc i32 %or to i161040 store i16 %conv1, ptr %add.ptr, align 21041 ret void1042}1043 1044define void @memop_signed_int_add5(ptr nocapture %p) nounwind {1045entry:1046; CHECK-LABEL: memop_signed_int_add5:1047; CHECK: memw(r{{[0-9]+}}+#0) += #51048 %0 = load i32, ptr %p, align 41049 %add = add i32 %0, 51050 store i32 %add, ptr %p, align 41051 ret void1052}1053 1054define void @memop_signed_int_add(ptr nocapture %p, i32 %x) nounwind {1055entry:1056; CHECK-LABEL: memop_signed_int_add:1057; CHECK: memw(r{{[0-9]+}}+#0) += r{{[0-9]+}}1058 %0 = load i32, ptr %p, align 41059 %add = add i32 %0, %x1060 store i32 %add, ptr %p, align 41061 ret void1062}1063 1064define void @memop_signed_int_sub(ptr nocapture %p, i32 %x) nounwind {1065entry:1066; CHECK-LABEL: memop_signed_int_sub:1067; CHECK: memw(r{{[0-9]+}}+#0) -= r{{[0-9]+}}1068 %0 = load i32, ptr %p, align 41069 %sub = sub i32 %0, %x1070 store i32 %sub, ptr %p, align 41071 ret void1072}1073 1074define void @memop_signed_int_or(ptr nocapture %p, i32 %x) nounwind {1075entry:1076; CHECK-LABEL: memop_signed_int_or:1077; CHECK: memw(r{{[0-9]+}}+#0) |= r{{[0-9]+}}1078 %0 = load i32, ptr %p, align 41079 %or = or i32 %0, %x1080 store i32 %or, ptr %p, align 41081 ret void1082}1083 1084define void @memop_signed_int_and(ptr nocapture %p, i32 %x) nounwind {1085entry:1086; CHECK-LABEL: memop_signed_int_and:1087; CHECK: memw(r{{[0-9]+}}+#0) &= r{{[0-9]+}}1088 %0 = load i32, ptr %p, align 41089 %and = and i32 %0, %x1090 store i32 %and, ptr %p, align 41091 ret void1092}1093 1094define void @memop_signed_int_clrbit(ptr nocapture %p) nounwind {1095entry:1096; CHECK-LABEL: memop_signed_int_clrbit:1097; CHECK: memw(r{{[0-9]+}}+#0) = clrbit(#5)1098 %0 = load i32, ptr %p, align 41099 %and = and i32 %0, -331100 store i32 %and, ptr %p, align 41101 ret void1102}1103 1104define void @memop_signed_int_setbit(ptr nocapture %p) nounwind {1105entry:1106; CHECK-LABEL: memop_signed_int_setbit:1107; CHECK: memw(r{{[0-9]+}}+#0) = setbit(#7)1108 %0 = load i32, ptr %p, align 41109 %or = or i32 %0, 1281110 store i32 %or, ptr %p, align 41111 ret void1112}1113 1114define void @memop_signed_int_add5_index(ptr nocapture %p, i32 %i) nounwind {1115entry:1116; CHECK-LABEL: memop_signed_int_add5_index:1117; CHECK: memw(r{{[0-9]+}}+#0) += #51118 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1119 %0 = load i32, ptr %add.ptr, align 41120 %add = add i32 %0, 51121 store i32 %add, ptr %add.ptr, align 41122 ret void1123}1124 1125define void @memop_signed_int_add_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1126entry:1127; CHECK-LABEL: memop_signed_int_add_index:1128; CHECK: memw(r{{[0-9]+}}+#0) += r{{[0-9]+}}1129 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1130 %0 = load i32, ptr %add.ptr, align 41131 %add = add i32 %0, %x1132 store i32 %add, ptr %add.ptr, align 41133 ret void1134}1135 1136define void @memop_signed_int_sub_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1137entry:1138; CHECK-LABEL: memop_signed_int_sub_index:1139; CHECK: memw(r{{[0-9]+}}+#0) -= r{{[0-9]+}}1140 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1141 %0 = load i32, ptr %add.ptr, align 41142 %sub = sub i32 %0, %x1143 store i32 %sub, ptr %add.ptr, align 41144 ret void1145}1146 1147define void @memop_signed_int_or_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1148entry:1149; CHECK-LABEL: memop_signed_int_or_index:1150; CHECK: memw(r{{[0-9]+}}+#0) |= r{{[0-9]+}}1151 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1152 %0 = load i32, ptr %add.ptr, align 41153 %or = or i32 %0, %x1154 store i32 %or, ptr %add.ptr, align 41155 ret void1156}1157 1158define void @memop_signed_int_and_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1159entry:1160; CHECK-LABEL: memop_signed_int_and_index:1161; CHECK: memw(r{{[0-9]+}}+#0) &= r{{[0-9]+}}1162 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1163 %0 = load i32, ptr %add.ptr, align 41164 %and = and i32 %0, %x1165 store i32 %and, ptr %add.ptr, align 41166 ret void1167}1168 1169define void @memop_signed_int_clrbit_index(ptr nocapture %p, i32 %i) nounwind {1170entry:1171; CHECK-LABEL: memop_signed_int_clrbit_index:1172; CHECK: memw(r{{[0-9]+}}+#0) = clrbit(#5)1173 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1174 %0 = load i32, ptr %add.ptr, align 41175 %and = and i32 %0, -331176 store i32 %and, ptr %add.ptr, align 41177 ret void1178}1179 1180define void @memop_signed_int_setbit_index(ptr nocapture %p, i32 %i) nounwind {1181entry:1182; CHECK-LABEL: memop_signed_int_setbit_index:1183; CHECK: memw(r{{[0-9]+}}+#0) = setbit(#7)1184 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1185 %0 = load i32, ptr %add.ptr, align 41186 %or = or i32 %0, 1281187 store i32 %or, ptr %add.ptr, align 41188 ret void1189}1190 1191define void @memop_signed_int_add5_index5(ptr nocapture %p) nounwind {1192entry:1193; CHECK-LABEL: memop_signed_int_add5_index5:1194; CHECK: memw(r{{[0-9]+}}+#20) += #51195 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51196 %0 = load i32, ptr %add.ptr, align 41197 %add = add i32 %0, 51198 store i32 %add, ptr %add.ptr, align 41199 ret void1200}1201 1202define void @memop_signed_int_add_index5(ptr nocapture %p, i32 %x) nounwind {1203entry:1204; CHECK-LABEL: memop_signed_int_add_index5:1205; CHECK: memw(r{{[0-9]+}}+#20) += r{{[0-9]+}}1206 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51207 %0 = load i32, ptr %add.ptr, align 41208 %add = add i32 %0, %x1209 store i32 %add, ptr %add.ptr, align 41210 ret void1211}1212 1213define void @memop_signed_int_sub_index5(ptr nocapture %p, i32 %x) nounwind {1214entry:1215; CHECK-LABEL: memop_signed_int_sub_index5:1216; CHECK: memw(r{{[0-9]+}}+#20) -= r{{[0-9]+}}1217 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51218 %0 = load i32, ptr %add.ptr, align 41219 %sub = sub i32 %0, %x1220 store i32 %sub, ptr %add.ptr, align 41221 ret void1222}1223 1224define void @memop_signed_int_or_index5(ptr nocapture %p, i32 %x) nounwind {1225entry:1226; CHECK-LABEL: memop_signed_int_or_index5:1227; CHECK: memw(r{{[0-9]+}}+#20) |= r{{[0-9]+}}1228 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51229 %0 = load i32, ptr %add.ptr, align 41230 %or = or i32 %0, %x1231 store i32 %or, ptr %add.ptr, align 41232 ret void1233}1234 1235define void @memop_signed_int_and_index5(ptr nocapture %p, i32 %x) nounwind {1236entry:1237; CHECK-LABEL: memop_signed_int_and_index5:1238; CHECK: memw(r{{[0-9]+}}+#20) &= r{{[0-9]+}}1239 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51240 %0 = load i32, ptr %add.ptr, align 41241 %and = and i32 %0, %x1242 store i32 %and, ptr %add.ptr, align 41243 ret void1244}1245 1246define void @memop_signed_int_clrbit_index5(ptr nocapture %p) nounwind {1247entry:1248; CHECK-LABEL: memop_signed_int_clrbit_index5:1249; CHECK: memw(r{{[0-9]+}}+#20) = clrbit(#5)1250 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51251 %0 = load i32, ptr %add.ptr, align 41252 %and = and i32 %0, -331253 store i32 %and, ptr %add.ptr, align 41254 ret void1255}1256 1257define void @memop_signed_int_setbit_index5(ptr nocapture %p) nounwind {1258entry:1259; CHECK-LABEL: memop_signed_int_setbit_index5:1260; CHECK: memw(r{{[0-9]+}}+#20) = setbit(#7)1261 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51262 %0 = load i32, ptr %add.ptr, align 41263 %or = or i32 %0, 1281264 store i32 %or, ptr %add.ptr, align 41265 ret void1266}1267 1268define void @memop_unsigned_int_add5(ptr nocapture %p) nounwind {1269entry:1270; CHECK-LABEL: memop_unsigned_int_add5:1271; CHECK: memw(r{{[0-9]+}}+#0) += #51272 %0 = load i32, ptr %p, align 41273 %add = add nsw i32 %0, 51274 store i32 %add, ptr %p, align 41275 ret void1276}1277 1278define void @memop_unsigned_int_add(ptr nocapture %p, i32 %x) nounwind {1279entry:1280; CHECK-LABEL: memop_unsigned_int_add:1281; CHECK: memw(r{{[0-9]+}}+#0) += r{{[0-9]+}}1282 %0 = load i32, ptr %p, align 41283 %add = add nsw i32 %0, %x1284 store i32 %add, ptr %p, align 41285 ret void1286}1287 1288define void @memop_unsigned_int_sub(ptr nocapture %p, i32 %x) nounwind {1289entry:1290; CHECK-LABEL: memop_unsigned_int_sub:1291; CHECK: memw(r{{[0-9]+}}+#0) -= r{{[0-9]+}}1292 %0 = load i32, ptr %p, align 41293 %sub = sub nsw i32 %0, %x1294 store i32 %sub, ptr %p, align 41295 ret void1296}1297 1298define void @memop_unsigned_int_or(ptr nocapture %p, i32 %x) nounwind {1299entry:1300; CHECK-LABEL: memop_unsigned_int_or:1301; CHECK: memw(r{{[0-9]+}}+#0) |= r{{[0-9]+}}1302 %0 = load i32, ptr %p, align 41303 %or = or i32 %0, %x1304 store i32 %or, ptr %p, align 41305 ret void1306}1307 1308define void @memop_unsigned_int_and(ptr nocapture %p, i32 %x) nounwind {1309entry:1310; CHECK-LABEL: memop_unsigned_int_and:1311; CHECK: memw(r{{[0-9]+}}+#0) &= r{{[0-9]+}}1312 %0 = load i32, ptr %p, align 41313 %and = and i32 %0, %x1314 store i32 %and, ptr %p, align 41315 ret void1316}1317 1318define void @memop_unsigned_int_clrbit(ptr nocapture %p) nounwind {1319entry:1320; CHECK-LABEL: memop_unsigned_int_clrbit:1321; CHECK: memw(r{{[0-9]+}}+#0) = clrbit(#5)1322 %0 = load i32, ptr %p, align 41323 %and = and i32 %0, -331324 store i32 %and, ptr %p, align 41325 ret void1326}1327 1328define void @memop_unsigned_int_setbit(ptr nocapture %p) nounwind {1329entry:1330; CHECK-LABEL: memop_unsigned_int_setbit:1331; CHECK: memw(r{{[0-9]+}}+#0) = setbit(#7)1332 %0 = load i32, ptr %p, align 41333 %or = or i32 %0, 1281334 store i32 %or, ptr %p, align 41335 ret void1336}1337 1338define void @memop_unsigned_int_add5_index(ptr nocapture %p, i32 %i) nounwind {1339entry:1340; CHECK-LABEL: memop_unsigned_int_add5_index:1341; CHECK: memw(r{{[0-9]+}}+#0) += #51342 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1343 %0 = load i32, ptr %add.ptr, align 41344 %add = add nsw i32 %0, 51345 store i32 %add, ptr %add.ptr, align 41346 ret void1347}1348 1349define void @memop_unsigned_int_add_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1350entry:1351; CHECK-LABEL: memop_unsigned_int_add_index:1352; CHECK: memw(r{{[0-9]+}}+#0) += r{{[0-9]+}}1353 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1354 %0 = load i32, ptr %add.ptr, align 41355 %add = add nsw i32 %0, %x1356 store i32 %add, ptr %add.ptr, align 41357 ret void1358}1359 1360define void @memop_unsigned_int_sub_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1361entry:1362; CHECK-LABEL: memop_unsigned_int_sub_index:1363; CHECK: memw(r{{[0-9]+}}+#0) -= r{{[0-9]+}}1364 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1365 %0 = load i32, ptr %add.ptr, align 41366 %sub = sub nsw i32 %0, %x1367 store i32 %sub, ptr %add.ptr, align 41368 ret void1369}1370 1371define void @memop_unsigned_int_or_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1372entry:1373; CHECK-LABEL: memop_unsigned_int_or_index:1374; CHECK: memw(r{{[0-9]+}}+#0) |= r{{[0-9]+}}1375 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1376 %0 = load i32, ptr %add.ptr, align 41377 %or = or i32 %0, %x1378 store i32 %or, ptr %add.ptr, align 41379 ret void1380}1381 1382define void @memop_unsigned_int_and_index(ptr nocapture %p, i32 %i, i32 %x) nounwind {1383entry:1384; CHECK-LABEL: memop_unsigned_int_and_index:1385; CHECK: memw(r{{[0-9]+}}+#0) &= r{{[0-9]+}}1386 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1387 %0 = load i32, ptr %add.ptr, align 41388 %and = and i32 %0, %x1389 store i32 %and, ptr %add.ptr, align 41390 ret void1391}1392 1393define void @memop_unsigned_int_clrbit_index(ptr nocapture %p, i32 %i) nounwind {1394entry:1395; CHECK-LABEL: memop_unsigned_int_clrbit_index:1396; CHECK: memw(r{{[0-9]+}}+#0) = clrbit(#5)1397 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1398 %0 = load i32, ptr %add.ptr, align 41399 %and = and i32 %0, -331400 store i32 %and, ptr %add.ptr, align 41401 ret void1402}1403 1404define void @memop_unsigned_int_setbit_index(ptr nocapture %p, i32 %i) nounwind {1405entry:1406; CHECK-LABEL: memop_unsigned_int_setbit_index:1407; CHECK: memw(r{{[0-9]+}}+#0) = setbit(#7)1408 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %i1409 %0 = load i32, ptr %add.ptr, align 41410 %or = or i32 %0, 1281411 store i32 %or, ptr %add.ptr, align 41412 ret void1413}1414 1415define void @memop_unsigned_int_add5_index5(ptr nocapture %p) nounwind {1416entry:1417; CHECK-LABEL: memop_unsigned_int_add5_index5:1418; CHECK: memw(r{{[0-9]+}}+#20) += #51419 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51420 %0 = load i32, ptr %add.ptr, align 41421 %add = add nsw i32 %0, 51422 store i32 %add, ptr %add.ptr, align 41423 ret void1424}1425 1426define void @memop_unsigned_int_add_index5(ptr nocapture %p, i32 %x) nounwind {1427entry:1428; CHECK-LABEL: memop_unsigned_int_add_index5:1429; CHECK: memw(r{{[0-9]+}}+#20) += r{{[0-9]+}}1430 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51431 %0 = load i32, ptr %add.ptr, align 41432 %add = add nsw i32 %0, %x1433 store i32 %add, ptr %add.ptr, align 41434 ret void1435}1436 1437define void @memop_unsigned_int_sub_index5(ptr nocapture %p, i32 %x) nounwind {1438entry:1439; CHECK-LABEL: memop_unsigned_int_sub_index5:1440; CHECK: memw(r{{[0-9]+}}+#20) -= r{{[0-9]+}}1441 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51442 %0 = load i32, ptr %add.ptr, align 41443 %sub = sub nsw i32 %0, %x1444 store i32 %sub, ptr %add.ptr, align 41445 ret void1446}1447 1448define void @memop_unsigned_int_or_index5(ptr nocapture %p, i32 %x) nounwind {1449entry:1450; CHECK-LABEL: memop_unsigned_int_or_index5:1451; CHECK: memw(r{{[0-9]+}}+#20) |= r{{[0-9]+}}1452 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51453 %0 = load i32, ptr %add.ptr, align 41454 %or = or i32 %0, %x1455 store i32 %or, ptr %add.ptr, align 41456 ret void1457}1458 1459define void @memop_unsigned_int_and_index5(ptr nocapture %p, i32 %x) nounwind {1460entry:1461; CHECK-LABEL: memop_unsigned_int_and_index5:1462; CHECK: memw(r{{[0-9]+}}+#20) &= r{{[0-9]+}}1463 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51464 %0 = load i32, ptr %add.ptr, align 41465 %and = and i32 %0, %x1466 store i32 %and, ptr %add.ptr, align 41467 ret void1468}1469 1470define void @memop_unsigned_int_clrbit_index5(ptr nocapture %p) nounwind {1471entry:1472; CHECK-LABEL: memop_unsigned_int_clrbit_index5:1473; CHECK: memw(r{{[0-9]+}}+#20) = clrbit(#5)1474 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51475 %0 = load i32, ptr %add.ptr, align 41476 %and = and i32 %0, -331477 store i32 %and, ptr %add.ptr, align 41478 ret void1479}1480 1481define void @memop_unsigned_int_setbit_index5(ptr nocapture %p) nounwind {1482entry:1483; CHECK-LABEL: memop_unsigned_int_setbit_index5:1484; CHECK: memw(r{{[0-9]+}}+#20) = setbit(#7)1485 %add.ptr = getelementptr inbounds i32, ptr %p, i32 51486 %0 = load i32, ptr %add.ptr, align 41487 %or = or i32 %0, 1281488 store i32 %or, ptr %add.ptr, align 41489 ret void1490}1491