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1; RUN: llc -mtriple=hexagon < %s2; REQUIRES: asserts3 4; Check that the verifier doesn't fail due to incorrect5; ordering of registers caused by PHI elimination.6 7; Function Attrs: readnone8define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 {9b0:10 br label %b111 12b1: ; preds = %b1, %b013 %v0 = phi i32 [ %a1, %b0 ], [ %v2, %b1 ]14 %v1 = phi i32 [ 0, %b0 ], [ %v4, %b1 ]15 %v2 = phi i32 [ %a0, %b0 ], [ %v0, %b1 ]16 %v3 = icmp slt i32 %v1, %a217 %v4 = add nsw i32 %v1, 118 br i1 %v3, label %b1, label %b219 20b2: ; preds = %b121 %v5 = add nsw i32 %v2, %v022 ret i32 %v523}24 25attributes #0 = { readnone }26