49 lines · plain
1; RUN: llc -mtriple=hexagon -relocation-model=pic < %s | FileCheck %s2 3; CHECK: r{{[0-9]+}} = add({{pc|PC}},##4; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}+r{{[0-9]+}}<<#2)5; CHECK: r{{[0-9]+}} = add(r{{[0-9]+}},r{{[0-9]+}})6 7 8define i32 @test(i32 %y) nounwind {9entry:10 switch i32 %y, label %sw.epilog [11 i32 1, label %sw.bb12 i32 2, label %sw.bb113 i32 3, label %sw.bb214 i32 4, label %sw.bb315 i32 5, label %sw.bb416 ]17 18sw.bb: ; preds = %entry19 tail call void @baz1() nounwind20 br label %sw.epilog21 22sw.bb1: ; preds = %entry23 tail call void @baz2(i32 2, i32 78) nounwind24 br label %sw.epilog25 26sw.bb2: ; preds = %entry27 tail call void @baz3(i32 59) nounwind28 br label %sw.epilog29 30sw.bb3: ; preds = %entry31 tail call void @baz4(i32 4, i32 14) nounwind32 br label %sw.epilog33 34sw.bb4: ; preds = %entry35 br label %sw.epilog36 37sw.epilog: ; preds = %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb, %entry38 %y.addr.0 = phi i32 [ %y, %entry ], [ 14, %sw.bb4 ], [ 4, %sw.bb3 ], [ 3, %sw.bb2 ], [ 2, %sw.bb1 ], [ 1, %sw.bb ]39 ret i32 %y.addr.040}41 42declare void @baz1(...)43 44declare void @baz2(i32, i32)45 46declare void @baz3(i32)47 48declare void @baz4(i32, i32)49