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1; RUN: llc -mtriple=hexagon -O2 < %s2; REQUIRES: asserts3; Check for successful compilation.4 5target triple = "hexagon"6 7%s.0 = type { [1 x i32] }8%s.1 = type { %s.2, i8, %s.6 }9%s.2 = type { %s.3 }10%s.3 = type { %s.4 }11%s.4 = type { %s.5 }12%s.5 = type { i32 }13%s.6 = type { ptr, ptr }14 15@g0 = external constant ptr16@g1 = external global i3217@g2 = internal global %s.1 zeroinitializer, section ".data..percpu", align 418@g3 = external global [3 x i32]19@g4 = private unnamed_addr constant [29 x i8] c"BUG: failure at %s:%d/%s()!\0A\00", align 120@g5 = private unnamed_addr constant [22 x i8] c"kernel/stop_machine.c\00", align 121@g6 = private unnamed_addr constant [14 x i8] c"cpu_stop_init\00", align 122@g7 = private unnamed_addr constant [5 x i8] c"BUG!\00", align 123 24; Function Attrs: nounwind25define internal i32 @f0() #0 section ".init.text" {26b0:27 %v0 = alloca i32, align 428 %v1 = load ptr, ptr @g0, align 4, !tbaa !029 %v3 = tail call i32 @f1(ptr %v1, i32 3, i32 0) #030 %v4 = load i32, ptr @g1, align 4, !tbaa !431 %v5 = icmp ult i32 %v3, %v432 br i1 %v5, label %b1, label %b433 34b1: ; preds = %b035 br label %b236 37b2: ; preds = %b2, %b138 %v6 = phi i32 [ %v18, %b2 ], [ %v3, %b1 ]39 %v7 = tail call i32 asm "", "=r,0"(ptr @g2) #0, !srcloc !640 %v8 = getelementptr inbounds [3 x i32], ptr @g3, i32 0, i32 %v641 %v9 = load i32, ptr %v8, align 4, !tbaa !742 %v10 = add i32 %v9, %v743 %v11 = inttoptr i32 %v10 to ptr44 store volatile i32 0, ptr %v0, align 445 %v13 = load volatile i32, ptr %v0, align 446 store volatile i32 %v13, ptr %v11, align 447 %v14 = getelementptr inbounds %s.1, ptr %v11, i32 0, i32 248 store ptr %v14, ptr %v14, align 4, !tbaa !949 %v16 = getelementptr inbounds %s.1, ptr %v11, i32 0, i32 2, i32 150 store ptr %v14, ptr %v16, align 4, !tbaa !1151 %v17 = add i32 %v6, 152 %v18 = tail call i32 @f1(ptr %v1, i32 3, i32 %v17) #053 %v19 = load i32, ptr @g1, align 4, !tbaa !454 %v20 = icmp ult i32 %v18, %v1955 br i1 %v20, label %b2, label %b356 57b3: ; preds = %b258 br label %b459 60b4: ; preds = %b3, %b061 %v21 = tail call i32 @f2() #062 %v22 = icmp eq i32 %v21, 063 br i1 %v22, label %b6, label %b5, !prof !1264 65b5: ; preds = %b466 %v23 = tail call i32 (ptr, ...) @f3(ptr @g4, ptr @g5, i32 354, ptr @g6) #067 tail call void (ptr, ...) @f4(ptr @g7) #168 unreachable69 70b6: ; preds = %b471 ret i32 072}73 74; Function Attrs: nounwind75declare i32 @f1(ptr, i32, i32) #076 77; Function Attrs: nounwind78declare i32 @f2() #079 80; Function Attrs: nounwind81declare i32 @f3(ptr, ...) #082 83; Function Attrs: noreturn84declare void @f4(ptr, ...) #185 86attributes #0 = { nounwind "target-cpu"="hexagonv55" }87attributes #1 = { noreturn }88 89!0 = !{!1, !1, i64 0}90!1 = !{!"any pointer", !2, i64 0}91!2 = !{!"omnipotent char", !3, i64 0}92!3 = !{!"Simple C/C++ TBAA"}93!4 = !{!5, !5, i64 0}94!5 = !{!"int", !2, i64 0}95!6 = !{i32 521672}96!7 = !{!8, !8, i64 0}97!8 = !{!"long", !2, i64 0}98!9 = !{!10, !1, i64 0}99!10 = !{!"list_head", !1, i64 0, !1, i64 4}100!11 = !{!10, !1, i64 4}101!12 = !{!"branch_weights", i32 64, i32 4}102