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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2; Check that we are able to predicate instructions with gp-relative3; addressing mode.4 5; CHECK: if ({{!?}}p{{[0-3]+}}{{(.new)?}}) r{{[0-9]+}} = memw(##g{{[01]}})6; CHECK: if ({{!?}}p{{[0-3]+}}) r{{[0-9]+}} = memw(##g{{[01]}})7 8@g0 = external global i329@g1 = common global i32 0, align 410 11define i32 @f0(i8 zeroext %a0, i8 zeroext %a1) #0 {12b0:13 %v0 = icmp eq i8 %a0, %a114 br i1 %v0, label %b2, label %b115 16b1: ; preds = %b017 %v1 = load i32, ptr @g1, align 418 br label %b319 20b2: ; preds = %b021 %v2 = load i32, ptr @g0, align 422 store i32 %v2, ptr @g1, align 423 br label %b324 25b3: ; preds = %b2, %b126 %v3 = phi i32 [ %v1, %b1 ], [ %v2, %b2 ]27 ret i32 %v328}29 30attributes #0 = { nounwind "target-cpu"="hexagonv5" }31