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1; RUN: llc -mtriple=hexagon < %s2; REQUIRES: asserts3 4; After a copy R20 = R29, RDF copy propagation attempted to replace R20 with5; R29. R29 did not have a reaching def at that point (which isn't unusual),6; but copy propagation tried to link the new use of R29 to the presumed7; reaching def (which was null), causing a crash.8 9target triple = "hexagon"10 11@g0 = external unnamed_addr global i1, align 412 13; Function Attrs: nounwind14declare ptr @llvm.stacksave() #015 16; Function Attrs: nounwind17declare void @llvm.stackrestore(ptr) #018 19; Function Attrs: norecurse nounwind20declare fastcc void @f0(i16 signext, i16 signext, i16 signext, ptr nocapture readonly, i16 signext, ptr nocapture) unnamed_addr #121 22; Function Attrs: norecurse nounwind23declare fastcc signext i16 @f1(i16 signext, i16 signext) unnamed_addr #124 25; Function Attrs: norecurse nounwind26define fastcc i32 @f2(ptr nocapture readonly %a0, i16 signext %a1, i16 signext %a2, ptr nocapture readonly %a3, i16 signext %a4, ptr nocapture readonly %a51, ptr nocapture %a6) unnamed_addr #1 {27b0:28 %v0 = tail call ptr @llvm.stacksave()29 %v1 = tail call fastcc signext i16 @f1(i16 signext %a2, i16 signext %a1)30 br i1 undef, label %b7, label %b131 32b1: ; preds = %b033 br i1 undef, label %b3, label %b234 35b2: ; preds = %b136 br i1 undef, label %b4, label %b837 38b3: ; preds = %b139 br i1 undef, label %b5, label %b840 41b4: ; preds = %b4, %b242 br i1 undef, label %b4, label %b6, !llvm.loop !243 44b5: ; preds = %b5, %b345 %v2 = phi i16 [ %v3, %b5 ], [ 0, %b3 ]46 %v3 = add i16 %v2, 147 %v4 = icmp sgt i32 0, -107374182548 br i1 %v4, label %b5, label %b649 50b6: ; preds = %b5, %b451 %v5 = phi i16 [ %v3, %b5 ], [ undef, %b4 ]52 br label %b753 54b7: ; preds = %b6, %b055 %v6 = phi i16 [ %v5, %b6 ], [ 0, %b0 ]56 br i1 undef, label %b9, label %b857 58b8: ; preds = %b7, %b3, %b259 %v7 = or i32 0, undef60 br label %b961 62b9: ; preds = %b8, %b763 %v8 = phi i16 [ 0, %b8 ], [ %v6, %b7 ]64 %v9 = phi i32 [ %v7, %b8 ], [ 0, %b7 ]65 %v10 = load i16, ptr undef, align 2, !tbaa !466 %v11 = sext i16 %v10 to i3267 %v12 = zext i16 %v10 to i3268 br i1 undef, label %b10, label %b1169 70b10: ; preds = %b971 store i1 true, ptr @g0, align 472 br label %b1173 74b11: ; preds = %b10, %b975 %v13 = load i16, ptr undef, align 2, !tbaa !476 %v14 = sext i16 %v13 to i3277 %v15 = shl nuw i32 %v12, 1678 %v16 = and i32 %v9, 6553579 %v17 = mul nsw i32 %v11, %v1680 %v18 = sitofp i32 %v15 to double81 %v19 = fsub double %v18, undef82 %v20 = sub nsw i32 %v15, %v1783 %v21 = fptosi double %v19 to i3284 %v22 = select i1 undef, i32 %v21, i32 %v2085 %v23 = mul nsw i32 %v14, %v1686 %v24 = add nsw i32 %v23, %v2287 %v25 = add nsw i32 %v24, 3276888 %v26 = lshr i32 %v25, 1689 %v27 = xor i1 undef, true90 %v28 = and i1 %v27, undef91 br i1 %v28, label %b12, label %b1392 93b12: ; preds = %b1194 store i1 true, ptr @g0, align 495 br label %b1396 97b13: ; preds = %b12, %b1198 br i1 undef, label %b14, label %b2499 100b14: ; preds = %b13101 br label %b15102 103b15: ; preds = %b23, %b14104 br i1 undef, label %b16, label %b17105 106b16: ; preds = %b15107 br label %b19108 109b17: ; preds = %b15110 %v29 = trunc i32 %v26 to i16111 %v30 = icmp eq i16 %v29, -32768112 %v31 = and i1 undef, %v30113 br i1 %v31, label %b18, label %b19114 115b18: ; preds = %b17116 store i1 true, ptr @g0, align 4117 br label %b20118 119b19: ; preds = %b17, %b16120 br label %b20121 122b20: ; preds = %b19, %b18123 %v32 = phi i32 [ 2147483647, %b18 ], [ 0, %b19 ]124 %v33 = icmp eq i16 %v8, 32767125 br i1 %v33, label %b21, label %b22126 127b21: ; preds = %b20128 store i1 true, ptr @g0, align 4129 br label %b23130 131b22: ; preds = %b20132 br label %b23133 134b23: ; preds = %b22, %b21135 %v34 = add nsw i32 %v32, 32768136 %v35 = lshr i32 %v34, 16137 %v36 = trunc i32 %v35 to i16138 store i16 %v36, ptr undef, align 2, !tbaa !4139 br i1 undef, label %b24, label %b15140 141b24: ; preds = %b23, %b13142 call fastcc void @f0(i16 signext undef, i16 signext %a1, i16 signext %a2, ptr %a3, i16 signext %a4, ptr %a6)143 call void @llvm.stackrestore(ptr %v0)144 ret i32 undef145}146 147attributes #0 = { nounwind }148attributes #1 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }149 150!llvm.module.flags = !{!0}151 152!0 = !{i32 6, !"Target Features", !1}153!1 = !{!"+hvx,+hvx-length64b"}154!2 = distinct !{!2, !3}155!3 = !{!"llvm.loop.threadify", i32 43789156}156!4 = !{!5, !5, i64 0}157!5 = !{!"short", !6, i64 0}158!6 = !{!"omnipotent char", !7, i64 0}159!7 = !{!"Simple C++ TBAA"}160