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1; RUN: llc -mtriple=hexagon -enable-pipeliner < %s2; REQUIRES: asserts3 4; Function Attrs: nounwind5define void @f0(ptr nocapture %a0) #0 {6b0:7 br i1 undef, label %b1, label %b28 9b1: ; preds = %b1, %b010 %v0 = phi i64 [ %v9, %b1 ], [ 0, %b0 ]11 %v1 = phi i32 [ %v10, %b1 ], [ 0, %b0 ]12 %v2 = getelementptr inbounds i32, ptr %a0, i32 %v113 %v3 = load i32, ptr %v2, align 4, !tbaa !014 %v4 = zext i32 %v3 to i6415 %v5 = load i32, ptr undef, align 4, !tbaa !016 %v6 = zext i32 %v5 to i6417 %v7 = shl nuw i64 %v6, 3218 %v8 = or i64 %v7, %v419 %v9 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v0, i64 %v8, i64 %v8)20 %v10 = add nsw i32 %v1, 421 %v11 = icmp slt i32 %v10, undef22 br i1 %v11, label %b1, label %b223 24b2: ; preds = %b1, %b025 %v12 = phi i64 [ 0, %b0 ], [ %v9, %b1 ]26 ret void27}28 29; Function Attrs: nounwind readnone30declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #131 32attributes #0 = { nounwind }33attributes #1 = { nounwind readnone }34 35!0 = !{!1, !1, i64 0}36!1 = !{!"int", !2}37!2 = !{!"omnipotent char", !3}38!3 = !{!"Simple C/C++ TBAA"}39