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1; RUN: llc -mtriple=hexagon -O3 < %s2; REQUIRES: asserts3 4; Don't change the dependences if it's going to cause a cycle.5 6; Function Attrs: nounwind7define void @f0(ptr nocapture %a0, i32 %a1) #0 {8b0:9 br i1 undef, label %b1, label %b210 11b1: ; preds = %b1, %b012 %v0 = phi ptr [ undef, %b1 ], [ undef, %b0 ]13 %v1 = phi i32 [ %v20, %b1 ], [ 1, %b0 ]14 %v2 = phi ptr [ %v6, %b1 ], [ %a0, %b0 ]15 %v3 = load i8, ptr %v2, align 116 %v4 = zext i8 %v3 to i3217 %v5 = mul nsw i32 %v4, 318 %v6 = getelementptr inbounds i8, ptr %v2, i32 119 %v7 = load i8, ptr %v6, align 120 %v8 = zext i8 %v7 to i3221 %v9 = add i32 %v8, 222 %v10 = add i32 %v9, %v523 %v11 = lshr i32 %v10, 224 %v12 = trunc i32 %v11 to i825 %v13 = getelementptr inbounds i8, ptr undef, i32 226 store i8 %v12, ptr %v0, align 127 %v14 = load i8, ptr %v2, align 128 %v15 = zext i8 %v14 to i3229 %v16 = add i32 %v15, 230 %v17 = add i32 %v16, 031 %v18 = lshr i32 %v17, 232 %v19 = trunc i32 %v18 to i833 store i8 %v19, ptr %v13, align 134 %v20 = add i32 %v1, 135 %v21 = icmp eq i32 %v20, %a136 br i1 %v21, label %b2, label %b137 38b2: ; preds = %b1, %b039 ret void40}41 42attributes #0 = { nounwind "target-cpu"="hexagonv55" }43