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1; RUN: llc -mtriple=hexagon -enable-aa-sched-mi -enable-pipeliner < %s2; REQUIRES: asserts3 4; Function Attrs: nounwind5define void @f0() #0 {6b0:7 br i1 undef, label %b1, label %b28 9b1: ; preds = %b010 unreachable11 12b2: ; preds = %b013 br i1 undef, label %b3, label %b414 15b3: ; preds = %b216 unreachable17 18b4: ; preds = %b219 br i1 undef, label %b5, label %b620 21b5: ; preds = %b422 unreachable23 24b6: ; preds = %b425 br label %b726 27b7: ; preds = %b7, %b628 br i1 undef, label %b8, label %b729 30b8: ; preds = %b731 br i1 undef, label %b15, label %b932 33b9: ; preds = %b834 br label %b1035 36b10: ; preds = %b10, %b937 br i1 undef, label %b11, label %b1038 39b11: ; preds = %b1040 br label %b1241 42b12: ; preds = %b12, %b1143 br i1 undef, label %b13, label %b1244 45b13: ; preds = %b13, %b1246 %v0 = phi i32 [ %v5, %b13 ], [ 0, %b12 ]47 %v1 = getelementptr inbounds [11 x i32], ptr undef, i32 0, i32 %v048 %v2 = load i32, ptr %v1, align 449 %v3 = add i32 %v2, 150 %v4 = lshr i32 %v3, 151 store i32 %v4, ptr %v1, align 452 store i32 0, ptr %v1, align 453 %v5 = add nsw i32 %v0, 154 %v6 = icmp eq i32 %v5, 1155 br i1 %v6, label %b14, label %b1356 57b14: ; preds = %b1358 br label %b1559 60b15: ; preds = %b14, %b861 ret void62}63 64attributes #0 = { nounwind "target-cpu"="hexagonv55" }65