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1; RUN: llc -mtriple=hexagon -mcpu=hexagonv60 < %s2; REQUIRES: asserts3 4; Test that the pipeliner reuses an existing Phi when generating the epilog5; block. In this case, the original loops has a Phi whose operand is another6; Phi. When the loop is pipelined, the Phi that generates the operand value7; is used in two stages. This means the Phi for the second stage can8; be reused. The bug causes an assert due to an invalid virtual register error9; in the live variable analysis.10 11define void @test(ptr %a, ptr %b)  #0 {12entry:13  br label %for.body6.us.prol14 15for.body6.us.prol:16  %i.065.us.prol = phi i32 [ 0, %entry ], [ %inc.us.prol, %for.body6.us.prol ]17  %im1.064.us.prol = phi i32 [ undef, %entry ], [ %i.065.us.prol, %for.body6.us.prol ]18  %prol.iter = phi i32 [ undef, %entry ], [ %prol.iter.sub, %for.body6.us.prol ]19  %arrayidx8.us.prol = getelementptr inbounds i8, ptr %b, i32 %im1.064.us.prol20  %0 = load i8, ptr %arrayidx8.us.prol, align 121  %conv9.us.prol = sext i8 %0 to i3222  %add.us.prol = add nsw i32 %conv9.us.prol, 023  %add12.us.prol = add nsw i32 %add.us.prol, 024  %mul.us.prol = mul nsw i32 %add12.us.prol, 325  %conv13.us.prol = trunc i32 %mul.us.prol to i826  %arrayidx14.us.prol = getelementptr inbounds i8, ptr %a, i32 %i.065.us.prol27  store i8 %conv13.us.prol, ptr %arrayidx14.us.prol, align 128  %inc.us.prol = add nuw nsw i32 %i.065.us.prol, 129  %prol.iter.sub = add i32 %prol.iter, -130  %prol.iter.cmp = icmp eq i32 %prol.iter.sub, 031  br i1 %prol.iter.cmp, label %for.body6.us, label %for.body6.us.prol32 33for.body6.us:34  %im2.063.us = phi i32 [ undef, %for.body6.us ], [ %im1.064.us.prol, %for.body6.us.prol ]35  %arrayidx10.us = getelementptr inbounds i8, ptr %b, i32 %im2.063.us36  %1 = load i8, ptr %arrayidx10.us, align 137  %conv11.us = sext i8 %1 to i3238  %add12.us = add nsw i32 0, %conv11.us39  %mul.us = mul nsw i32 %add12.us, 340  %conv13.us = trunc i32 %mul.us to i841  store i8 %conv13.us, ptr undef, align 142  br label %for.body6.us43}44 45