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1# RUN: llc -mtriple=hexagon -run-pass pipeliner %s -o /dev/null2 3# Check that edges that violate topological order are not added to the4# SwingSchedulerDAG. This is a case where the crash was caused by PR 145878.5 6--- |7 target triple = "hexagon"8 9 define void @crash_145878() {10 entry:11 br label %loop12 13 loop: ; preds = %loop, %entry14 %lsr.iv2 = phi i32 [ %lsr.iv.next, %loop ], [ 1, %entry ]15 %lsr.iv = phi ptr [ %cgep3, %loop ], [ inttoptr (i32 -8 to ptr), %entry ]16 %cgep = getelementptr i8, ptr %lsr.iv, i32 1217 %load = load i32, ptr %cgep, align 418 store i32 %load, ptr %lsr.iv, align 419 %lsr.iv.next = add nsw i32 %lsr.iv2, -120 %iv.cmp.not = icmp eq i32 %lsr.iv.next, 021 %cgep3 = getelementptr i8, ptr %lsr.iv, i32 -822 br i1 %iv.cmp.not, label %exit, label %loop23 24 exit: ; preds = %loop25 ret void26 }27...28---29name: crash_14587830tracksRegLiveness: true31body: |32 bb.0.entry:33 successors: %bb.1(0x80000000)34 35 %5:intregs = A2_tfrsi -836 J2_loop0i %bb.1, 1, implicit-def $lc0, implicit-def $sa0, implicit-def $usr37 38 bb.1.loop (machine-block-address-taken):39 successors: %bb.2(0x04000000), %bb.1(0x7c000000)40 41 %1:intregs = PHI %5, %bb.0, %3, %bb.142 %6:intregs = L2_loadri_io %1, 12 :: (load (s32) from %ir.cgep)43 S2_storeri_io %1, 0, killed %6 :: (store (s32) into %ir.lsr.iv)44 %3:intregs = A2_addi %1, -845 ENDLOOP0 %bb.1, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc046 J2_jump %bb.2, implicit-def dead $pc47 48 bb.2.exit:49 PS_jmpret $r31, implicit-def dead $pc50...51