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1; RUN: llc -mtriple=hexagon -O3 < %s -pipeliner-experimental-cg=true | FileCheck %s2 3; Test that the MinStart computation, which is based upon the length4; of the chain edges, is computed correctly. A bug in the code allowed5; two instuctions that have a chain edge to be scheduled more than II6; instructions apart. In this test, if two stores appear before the7; store, then that is a bug.8 9; CHECK: r{{[0-9]+}} = memw([[REG0:r([0-9]+)]]+#12)10; CHECK-NOT: r{{[0-9]+}} = memw([[REG0]]+#12)11; CHECK: memw([[REG0]]+#12) = r{{[0-9]+}}12 13%s.0 = type { i64, i32, i32, i32, ptr }14 15@g0 = external global %s.0, align 816 17; Function Attrs: nounwind18define void @f0() #0 {19b0:20 %v0 = load i32, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 1), align 821 %v1 = ashr i32 %v0, 322 br i1 undef, label %b1, label %b223 24b1: ; preds = %b1, %b025 %v2 = phi i32 [ %v5, %b1 ], [ 0, %b0 ]26 %v3 = load ptr, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 4), align 427 %v4 = getelementptr inbounds i8, ptr %v3, i32 -128 store ptr %v4, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 4), align 429 store i8 0, ptr %v4, align 130 %v5 = add nsw i32 %v2, 131 %v6 = icmp eq i32 %v5, %v132 br i1 %v6, label %b2, label %b133 34b2: ; preds = %b1, %b035 ret void36}37 38attributes #0 = { nounwind "target-cpu"="hexagonv60" }39