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1; RUN: llc -mtriple=hexagon -O3 < %s2; REQUIRES: asserts3 4; Test that we generate the correct names for Phis when there is5; a Phi that references a Phi that references another Phi. For example,6; v6 = phi(v1, v9)7; v7 = phi(v0, v6)8; v8 = phi(v2, v7)9 10; Function Attrs: nounwind11define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, ptr noalias nocapture %a3, i32 %a4) #0 {12b0:13 %v0 = add i32 %a1, -114 %v2 = getelementptr inbounds i8, ptr %a0, i32 undef15 br i1 undef, label %b1, label %b416 17b1: ; preds = %b1, %b018 br i1 undef, label %b1, label %b219 20b2: ; preds = %b121 %v4 = getelementptr inbounds i8, ptr %a0, i32 undef22 br label %b323 24b3: ; preds = %b3, %b225 %v5 = phi ptr [ %v10, %b3 ], [ %a3, %b2 ]26 %v6 = phi ptr [ %v25, %b3 ], [ %v4, %b2 ]27 %v7 = phi ptr [ %v6, %b3 ], [ %v2, %b2 ]28 %v8 = phi ptr [ %v7, %b3 ], [ %a0, %b2 ]29 %v9 = phi i32 [ %v26, %b3 ], [ 1, %b2 ]30 %v10 = getelementptr inbounds i8, ptr %v5, i32 %a431 %v11 = getelementptr inbounds i8, ptr %v8, i32 -132 %v12 = load i8, ptr %v11, align 1, !tbaa !033 %v13 = zext i8 %v12 to i3234 %v14 = add nuw nsw i32 %v13, 035 %v15 = add nuw nsw i32 %v14, 036 %v16 = add nuw nsw i32 %v15, 037 %v17 = load i8, ptr %v6, align 1, !tbaa !038 %v18 = zext i8 %v17 to i3239 %v19 = add nuw nsw i32 %v16, %v1840 %v20 = add nuw nsw i32 %v19, 041 %v21 = mul nsw i32 %v20, 728242 %v22 = add nsw i32 %v21, 3276843 %v23 = lshr i32 %v22, 1644 %v24 = trunc i32 %v23 to i845 store i8 %v24, ptr %v10, align 1, !tbaa !046 %v25 = getelementptr inbounds i8, ptr %v6, i32 %a247 %v26 = add i32 %v9, 148 %v27 = icmp eq i32 %v26, %v049 br i1 %v27, label %b4, label %b350 51b4: ; preds = %b3, %b052 ret void53}54 55attributes #0 = { nounwind "target-cpu"="hexagonv55" }56 57!0 = !{!1, !1, i64 0}58!1 = !{!"omnipotent char", !2, i64 0}59!2 = !{!"Simple C/C++ TBAA"}60