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1; RUN: llc -mtriple=hexagon -enable-pipeliner -pipeliner-max-stages=2 < %s -pipeliner-experimental-cg=true | FileCheck %s2 3; Test that the generatePhi code doesn't rename a a Phi instruction that's defined4; in the same block. The bug causes a Phi to incorrectly depend on another Phi.5 6; CHECK: loop0(.LBB0_[[LOOP:.]],7; CHECK: .LBB0_[[LOOP]]:8; CHECK: memh([[REG0:(r[0-9]+)]]++#2:circ9; CHECK: = mem{{u?}}h([[REG0]]+#0)10; CHECK: endloop011 12; Function Attrs: argmemonly nounwind13declare ptr @llvm.hexagon.circ.sthhi(ptr, i32, i32, i32) #114 15; Function Attrs: nounwind optsize16define signext i16 @f0(ptr %a0, ptr %a1, i16 signext %a2, i16 signext %a3) #0 {17b0:18 br label %b119 20b1: ; preds = %b1, %b021 %v0 = phi ptr [ %v10, %b1 ], [ %a1, %b0 ]22 %v1 = phi i32 [ %v13, %b1 ], [ 1, %b0 ]23 %v2 = phi i16 [ %v12, %b1 ], [ 0, %b0 ]24 %v3 = bitcast ptr %v0 to ptr25 %v4 = add nsw i32 %v1, 1026 %v5 = getelementptr inbounds i16, ptr %a0, i32 %v427 %v6 = load i16, ptr %v5, align 2, !tbaa !028 %v7 = sext i16 %v6 to i3229 %v8 = add nsw i32 %v7, 4000030 %v9 = tail call ptr @llvm.hexagon.circ.sthhi(ptr %v3, i32 %v8, i32 117441022, i32 2)31 %v10 = bitcast ptr %v9 to ptr32 %v11 = load i16, ptr %v10, align 2, !tbaa !033 %v12 = add i16 %v11, %v234 %v13 = add i32 %v1, 135 %v14 = icmp eq i32 %v13, 100036 br i1 %v14, label %b2, label %b137 38b2: ; preds = %b139 br label %b340 41b3: ; preds = %b242 ret i16 %v1243}44 45attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }46attributes #1 = { argmemonly nounwind }47 48!0 = !{!1, !1, i64 0}49!1 = !{!"short", !2}50!2 = !{!"omnipotent char", !3}51!3 = !{!"Simple C/C++ TBAA"}52