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1; RUN: llc -mtriple=hexagon -enable-pipeliner -pipeliner-max-stages=2 < %s -pipeliner-experimental-cg=true | FileCheck %s2 3; Test that we generate the correct offsets after we removed unneeded4; chain dependences between Phis and generated a better pipeline.5 6; CHECK: loop0(.LBB0_[[LOOP:.]],7; CHECK: .LBB0_[[LOOP]]:8; CHECK: = memd([[REG0:(r[0-9]+)]]+#8)9; CHECK: memd([[REG0]]++#8) =10; CHECK: }{{[ \t]*}}:endloop011 12@g0 = common global [400 x i8] zeroinitializer, align 813@g1 = common global [400 x i8] zeroinitializer, align 814 15; Function Attrs: nounwind16define void @f0() #0 {17b0:18 br label %b219 20b1: ; preds = %b221 ret void22 23b2: ; preds = %b2, %b024 %v0 = phi ptr [ @g0, %b0 ], [ %v23, %b2 ]25 %v1 = phi ptr [ @g1, %b0 ], [ %v24, %b2 ]26 %v2 = phi i32 [ 0, %b0 ], [ %v21, %b2 ]27 %v4 = load <8 x i8>, ptr %v0, align 828 %v6 = load <8 x i8>, ptr %v1, align 829 %v7 = bitcast <8 x i8> %v4 to <2 x i32>30 %v8 = extractelement <2 x i32> %v7, i32 031 %v9 = extractelement <2 x i32> %v7, i32 132 %v10 = bitcast <8 x i8> %v6 to <2 x i32>33 %v11 = extractelement <2 x i32> %v10, i32 034 %v12 = extractelement <2 x i32> %v10, i32 135 %v13 = tail call i64 @llvm.hexagon.S2.vzxtbh(i32 %v11)36 %v14 = tail call i64 @llvm.hexagon.S2.vzxtbh(i32 %v12)37 %v15 = tail call i64 @llvm.hexagon.M5.vmacbsu(i64 %v13, i32 %v8, i32 117901063)38 %v16 = tail call i64 @llvm.hexagon.M5.vmacbsu(i64 %v14, i32 %v9, i32 117901063)39 %v17 = tail call i32 @llvm.hexagon.S2.vtrunehb(i64 %v15)40 %v18 = tail call i32 @llvm.hexagon.S2.vtrunehb(i64 %v16)41 %v19 = tail call i64 @llvm.hexagon.A2.combinew(i32 %v18, i32 %v17)42 %v20 = bitcast i64 %v19 to <8 x i8>43 store <8 x i8> %v20, ptr %v1, align 844 %v21 = add nsw i32 %v2, 845 %v22 = icmp slt i32 %v2, 39246 %v23 = getelementptr i8, ptr %v0, i32 847 %v24 = getelementptr i8, ptr %v1, i32 848 br i1 %v22, label %b2, label %b149}50 51; Function Attrs: nounwind readnone52declare i64 @llvm.hexagon.S2.vzxtbh(i32) #153 54; Function Attrs: nounwind readnone55declare i64 @llvm.hexagon.M5.vmacbsu(i64, i32, i32) #156 57; Function Attrs: nounwind readnone58declare i32 @llvm.hexagon.S2.vtrunehb(i64) #159 60; Function Attrs: nounwind readnone61declare i64 @llvm.hexagon.A2.combinew(i32, i32) #162 63attributes #0 = { nounwind }64attributes #1 = { nounwind readnone }65