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1; RUN: llc -mtriple=hexagon -hexagon-initial-cfg-cleanup=0 -enable-pipeliner -pipeliner-max-stages=2 < %s -pipeliner-experimental-cg=true | FileCheck %s2 3; Check that the pipelined code uses the proper address in the4; prolog and the kernel. The bug occurs when the address computation5; computes the same value twice.6 7; CHECK: = addasl(r{{[0-9]+}},[[REG0:(r[0-9]+)]],#1)8; CHECK-NOT: = addasl(r{{[0-9]+}},[[REG0]],#1)9 10; Function Attrs: nounwind11define void @f0(i32 %a0, ptr nocapture %a1) #0 {12b0:13 br i1 undef, label %b2, label %b114 15b1: ; preds = %b016 unreachable17 18b2: ; preds = %b019 br label %b320 21b3: ; preds = %b4, %b222 br i1 undef, label %b4, label %b523 24b4: ; preds = %b325 br label %b326 27b5: ; preds = %b328 br i1 undef, label %b6, label %b729 30b6: ; preds = %b531 unreachable32 33b7: ; preds = %b534 br i1 undef, label %b8, label %b1235 36b8: ; preds = %b737 br i1 undef, label %b9, label %b1138 39b9: ; preds = %b9, %b840 br i1 undef, label %b9, label %b1041 42b10: ; preds = %b943 br i1 undef, label %b12, label %b1144 45b11: ; preds = %b11, %b10, %b846 %v0 = phi i32 [ %v6, %b11 ], [ undef, %b8 ], [ undef, %b10 ]47 %v1 = phi i32 [ %v0, %b11 ], [ %a0, %b8 ], [ undef, %b10 ]48 %v2 = add nsw i32 %v1, -249 %v3 = getelementptr inbounds i16, ptr %a1, i32 %v250 %v4 = load i16, ptr %v3, align 2, !tbaa !051 %v5 = getelementptr inbounds i16, ptr %a1, i32 %v052 store i16 %v4, ptr %v5, align 2, !tbaa !053 %v6 = add nsw i32 %v0, -154 %v7 = icmp sgt i32 %v6, 055 br i1 %v7, label %b11, label %b1256 57b12: ; preds = %b11, %b10, %b758 ret void59}60 61attributes #0 = { nounwind "target-cpu"="hexagonv55" }62 63!0 = !{!1, !1, i64 0}64!1 = !{!"short", !2}65!2 = !{!"omnipotent char", !3}66!3 = !{!"Simple C/C++ TBAA"}67