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1; RUN: llc -mtriple=hexagon -enable-pipeliner -pipeliner-max-stages=2 -disable-packetizer < %s | FileCheck %s2 3; Test that the early start and late start values are computed correctly4; when a Phi depends on another Phi. In this case, they should occur in5; the same stage.6 7; CHECK-DAG: [[REG3:(r[0-9]+)]] = add([[REG1:(r[0-9]+)]],#-1)8; CHECK-DAG: [[REG2:(r[0-9]+)]] = add([[REG4:(r[0-9]+)]],#-1)9; CHECK-DAG: loop0(.LBB0_[[LOOP:.]],[[REG2]])10; CHECK-NOT: = [[REG3]]11; CHECK-NOT: = [[REG2]]12; CHECK: .LBB0_[[LOOP]]:13; CHECK: }{{[ \t]*}}:endloop14 15; Function Attrs: nounwind16define void @f0(i32 %a0, ptr nocapture %a1) #0 {17b0:18 br i1 undef, label %b1, label %b219 20b1: ; preds = %b021 %v0 = add nsw i32 undef, -822 br i1 undef, label %b3, label %b223 24b2: ; preds = %b2, %b1, %b025 %v1 = phi i32 [ %v7, %b2 ], [ undef, %b0 ], [ %v0, %b1 ]26 %v2 = phi i32 [ %v1, %b2 ], [ %a0, %b0 ], [ undef, %b1 ]27 %v3 = add nsw i32 %v2, -228 %v4 = getelementptr inbounds i16, ptr %a1, i32 %v329 %v5 = load i16, ptr %v4, align 2, !tbaa !030 %v6 = getelementptr inbounds i16, ptr %a1, i32 %v131 store i16 %v5, ptr %v6, align 2, !tbaa !032 %v7 = add nsw i32 %v1, -133 %v8 = icmp sgt i32 %v7, 034 br i1 %v8, label %b2, label %b335 36b3: ; preds = %b2, %b137 ret void38}39 40attributes #0 = { nounwind "target-cpu"="hexagonv55" }41 42!0 = !{!1, !1, i64 0}43!1 = !{!"short", !2, i64 0}44!2 = !{!"omnipotent char", !3, i64 0}45!3 = !{!"Simple C/C++ TBAA"}46