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1; RUN: llc -mtriple=hexagon -fp-contract=fast -enable-pipeliner < %s2; REQUIRES: asserts3 4; Pipelining can eliminate the need for a Phi if the loop carried use5; is scheduled first. We need to rename register uses of the Phi6; that may occur after the loop.7 8define void @f0() #0 {9b0:10 br i1 undef, label %b1, label %b1211 12b1: ; preds = %b013 %v0 = load float, ptr undef, align 414 br i1 undef, label %b2, label %b515 16b2: ; preds = %b117 br i1 undef, label %b3, label %b418 19b3: ; preds = %b3, %b220 br label %b321 22b4: ; preds = %b4, %b223 br i1 undef, label %b5, label %b424 25b5: ; preds = %b4, %b126 br i1 undef, label %b6, label %b927 28b6: ; preds = %b529 br i1 undef, label %b7, label %b830 31b7: ; preds = %b7, %b632 br label %b733 34b8: ; preds = %b8, %b635 %v1 = phi i32 [ %v7, %b8 ], [ 2, %b6 ]36 %v2 = phi float [ %v6, %b8 ], [ undef, %b6 ]37 %v3 = phi float [ %v2, %b8 ], [ undef, %b6 ]38 %v4 = fmul float undef, %v239 %v5 = fsub float %v4, %v340 %v6 = fadd float %v5, undef41 %v7 = add nsw i32 %v1, 142 %v8 = icmp eq i32 %v7, undef43 br i1 %v8, label %b9, label %b844 45b9: ; preds = %b8, %b546 %v9 = phi float [ undef, %b5 ], [ %v2, %b8 ]47 %v10 = fsub float 0.000000e+00, %v948 %v11 = fadd float %v10, undef49 %v12 = fmul float undef, %v1150 %v13 = fcmp ugt float %v12, 0.000000e+0051 br i1 %v13, label %b10, label %b1152 53b10: ; preds = %b954 br label %b1155 56b11: ; preds = %b10, %b957 %v14 = phi float [ undef, %b10 ], [ %v0, %b9 ]58 %v15 = fadd float undef, %v1459 br label %b1360 61b12: ; preds = %b062 ret void63 64b13: ; preds = %b13, %b1165 br label %b1366}67 68attributes #0 = { nounwind "target-cpu"="hexagonv55" }69