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1; RUN: llc -mtriple=hexagon -enable-pipeliner -debug-only=pipeliner < %s -o - 2>&1 > /dev/null -pipeliner-experimental-cg=true | FileCheck %s2; REQUIRES: asserts3 4; Test that checks that we compute the correct ResMII for haar.5 6; CHECK: MII = 4 MAX_II = 14 (rec=1, res=4)7 8; Function Attrs: nounwind9define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3, ptr noalias nocapture %a4, i32 %a5) #0 {10b0:11 %v0 = ashr i32 %a3, 212 %v1 = ashr i32 %a3, 113 %v2 = add i32 %v1, %v014 %v3 = icmp sgt i32 %a2, 015 br i1 %v3, label %b1, label %b816 17b1: ; preds = %b018 %v4 = sdiv i32 %a1, 6419 %v5 = icmp sgt i32 %a1, 6320 br label %b221 22b2: ; preds = %b6, %b123 %v6 = phi i32 [ 0, %b1 ], [ %v56, %b6 ]24 %v7 = ashr exact i32 %v6, 125 %v8 = mul nsw i32 %v7, %a326 br i1 %v5, label %b3, label %b627 28b3: ; preds = %b229 %v9 = add nsw i32 %v6, 130 %v10 = mul nsw i32 %v9, %a531 %v11 = mul nsw i32 %v6, %a532 %v12 = add i32 %v2, %v833 %v13 = add i32 %v8, %v034 %v14 = add i32 %v8, %v135 %v15 = getelementptr inbounds i8, ptr %a4, i32 %v1036 %v16 = getelementptr inbounds i8, ptr %a4, i32 %v1137 %v17 = getelementptr inbounds i16, ptr %a0, i32 %v1238 %v18 = getelementptr inbounds i16, ptr %a0, i32 %v1339 %v19 = getelementptr inbounds i16, ptr %a0, i32 %v1440 %v20 = getelementptr inbounds i16, ptr %a0, i32 %v841 br label %b442 43b4: ; preds = %b4, %b344 %v27 = phi i32 [ 0, %b3 ], [ %v54, %b4 ]45 %v28 = phi ptr [ %v20, %b3 ], [ %v34, %b4 ]46 %v29 = phi ptr [ %v19, %b3 ], [ %v36, %b4 ]47 %v30 = phi ptr [ %v18, %b3 ], [ %v38, %b4 ]48 %v31 = phi ptr [ %v17, %b3 ], [ %v40, %b4 ]49 %v32 = phi ptr [ %v15, %b3 ], [ %v53, %b4 ]50 %v33 = phi ptr [ %v16, %b3 ], [ %v52, %b4 ]51 %v34 = getelementptr inbounds <16 x i32>, ptr %v28, i32 152 %v35 = load <16 x i32>, ptr %v28, align 6453 %v36 = getelementptr inbounds <16 x i32>, ptr %v29, i32 154 %v37 = load <16 x i32>, ptr %v29, align 6455 %v38 = getelementptr inbounds <16 x i32>, ptr %v30, i32 156 %v39 = load <16 x i32>, ptr %v30, align 6457 %v40 = getelementptr inbounds <16 x i32>, ptr %v31, i32 158 %v41 = load <16 x i32>, ptr %v31, align 6459 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v35, <16 x i32> %v37)60 %v43 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %v35, <16 x i32> %v37)61 %v44 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v39, <16 x i32> %v41)62 %v45 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %v39, <16 x i32> %v41)63 %v46 = tail call <16 x i32> @llvm.hexagon.V6.vavgh(<16 x i32> %v42, <16 x i32> %v44)64 %v47 = tail call <16 x i32> @llvm.hexagon.V6.vnavgh(<16 x i32> %v42, <16 x i32> %v44)65 %v48 = tail call <16 x i32> @llvm.hexagon.V6.vavgh(<16 x i32> %v43, <16 x i32> %v45)66 %v49 = tail call <16 x i32> @llvm.hexagon.V6.vnavgh(<16 x i32> %v43, <16 x i32> %v45)67 %v50 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %v47, <16 x i32> %v46)68 %v51 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %v49, <16 x i32> %v48)69 %v52 = getelementptr inbounds <16 x i32>, ptr %v33, i32 170 store <16 x i32> %v50, ptr %v33, align 6471 %v53 = getelementptr inbounds <16 x i32>, ptr %v32, i32 172 store <16 x i32> %v51, ptr %v32, align 6473 %v54 = add nsw i32 %v27, 174 %v55 = icmp slt i32 %v54, %v475 br i1 %v55, label %b4, label %b576 77b5: ; preds = %b478 br label %b679 80b6: ; preds = %b5, %b281 %v56 = add nsw i32 %v6, 282 %v57 = icmp slt i32 %v56, %a283 br i1 %v57, label %b2, label %b784 85b7: ; preds = %b686 br label %b887 88b8: ; preds = %b7, %b089 ret void90}91 92; Function Attrs: nounwind readnone93declare <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32>, <16 x i32>) #194 95; Function Attrs: nounwind readnone96declare <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32>, <16 x i32>) #197 98; Function Attrs: nounwind readnone99declare <16 x i32> @llvm.hexagon.V6.vavgh(<16 x i32>, <16 x i32>) #1100 101; Function Attrs: nounwind readnone102declare <16 x i32> @llvm.hexagon.V6.vnavgh(<16 x i32>, <16 x i32>) #1103 104; Function Attrs: nounwind readnone105declare <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32>, <16 x i32>) #1106 107attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }108attributes #1 = { nounwind readnone }109