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1; RUN: llc -mtriple=hexagon < %s -pipeliner-experimental-cg=true -terminal-rule=0 | FileCheck %s2 3; Test that the pipeliner generates correct code when attempting to reuse4; an existing phi. This test case contains a phi that references another5; phi (the value from the previous iteration), and when there is a use that6; is schedule in a later iteration. When this occurs, the pipeliner was7; using a value from the wrong iteration.8 9; CHECK: loop0(.LBB0_[[LOOP:.]],10; CHECK: .LBB0_[[LOOP]]:11; CHECK: vlalign([[VREG1:v([0-9]+)]],[[VREG2:v([0-9]+)]],#2)12; CHECK: [[VREG2]]:{{[0-9]+}} = vcombine([[VREG1]],v{{[0-9]+}})13; CHECK: }{{[ \t]*}}:endloop014 15; Function Attrs: nounwind16define void @f0(i32 %a0, i32 %a1, ptr %a2, ptr %a3) #0 {17b0:18 %v0 = shl nsw i32 %a0, 119 %v1 = sub i32 0, %v020 %v2 = sub i32 0, %a021 %v3 = getelementptr inbounds i8, ptr %a2, i32 %v122 %v4 = getelementptr inbounds i8, ptr %a2, i32 %v223 %v5 = getelementptr inbounds i8, ptr %a2, i32 %a024 %v6 = getelementptr inbounds i8, ptr %a2, i32 %v025 %v7 = getelementptr inbounds i8, ptr %v6, i32 6426 %v9 = getelementptr inbounds i8, ptr %v5, i32 6427 %v11 = getelementptr inbounds i8, ptr %a2, i32 6428 %v13 = getelementptr inbounds i8, ptr %v4, i32 6429 %v15 = getelementptr inbounds i8, ptr %v3, i32 6430 br label %b131 32b1: ; preds = %b1, %b033 %v17 = phi ptr [ %v59, %b1 ], [ %a3, %b0 ]34 %v18 = phi ptr [ %v34, %b1 ], [ %v7, %b0 ]35 %v19 = phi ptr [ %v32, %b1 ], [ %v9, %b0 ]36 %v20 = phi ptr [ %v30, %b1 ], [ %v11, %b0 ]37 %v21 = phi ptr [ %v28, %b1 ], [ %v13, %b0 ]38 %v22 = phi ptr [ %v26, %b1 ], [ %v15, %b0 ]39 %v23 = phi <32 x i32> [ %v39, %b1 ], [ undef, %b0 ]40 %v24 = phi <32 x i32> [ %v23, %b1 ], [ undef, %b0 ]41 %v25 = phi i32 [ %v60, %b1 ], [ %a1, %b0 ]42 %v26 = getelementptr inbounds <16 x i32>, ptr %v22, i32 143 %v27 = load <16 x i32>, ptr %v22, align 6444 %v28 = getelementptr inbounds <16 x i32>, ptr %v21, i32 145 %v29 = load <16 x i32>, ptr %v21, align 6446 %v30 = getelementptr inbounds <16 x i32>, ptr %v20, i32 147 %v31 = load <16 x i32>, ptr %v20, align 6448 %v32 = getelementptr inbounds <16 x i32>, ptr %v19, i32 149 %v33 = load <16 x i32>, ptr %v19, align 6450 %v34 = getelementptr inbounds <16 x i32>, ptr %v18, i32 151 %v35 = load <16 x i32>, ptr %v18, align 6452 %v36 = tail call <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32> %v27, <16 x i32> %v35) #253 %v37 = tail call <32 x i32> @llvm.hexagon.V6.vmpybus.acc(<32 x i32> %v36, <16 x i32> %v31, i32 101058054) #254 %v38 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v33, <16 x i32> %v29) #255 %v39 = tail call <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32> %v37, <32 x i32> %v38, i32 67372036) #256 %v40 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v23) #257 %v41 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v24) #258 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v40, <16 x i32> %v41, i32 2) #259 %v43 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v23) #260 %v44 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v24) #261 %v45 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v43, <16 x i32> %v44, i32 2) #262 %v46 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v39) #263 %v47 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v46, <16 x i32> %v40, i32 2) #264 %v48 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v39) #265 %v49 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v48, <16 x i32> %v43, i32 2) #266 %v50 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v45, <16 x i32> %v43) #267 %v51 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v40, <16 x i32> %v47) #268 %v52 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v42, <16 x i32> %v47) #269 %v53 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32> %v52, <16 x i32> %v40, i32 101058054) #270 %v54 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32> %v53, <16 x i32> %v50, i32 67372036) #271 %v55 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v45, <16 x i32> %v49) #272 %v56 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32> %v55, <16 x i32> %v43, i32 101058054) #273 %v57 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32> %v56, <16 x i32> %v51, i32 67372036) #274 %v58 = tail call <16 x i32> @llvm.hexagon.V6.vshuffob(<16 x i32> %v57, <16 x i32> %v54) #275 %v59 = getelementptr inbounds <16 x i32>, ptr %v17, i32 176 store <16 x i32> %v58, ptr %v17, align 6477 %v60 = add nsw i32 %v25, -6478 %v61 = icmp sgt i32 %v25, 12879 br i1 %v61, label %b1, label %b280 81b2: ; preds = %b182 ret void83}84 85; Function Attrs: nounwind readnone86declare <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32>, <16 x i32>) #187 88declare <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32>, <32 x i32>, i32) #189declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #190declare <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32>, <16 x i32>, i32) #191declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #192declare <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32>, <16 x i32>, i32) #193declare <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32>, <16 x i32>) #194declare <32 x i32> @llvm.hexagon.V6.vaddubh(<16 x i32>, <16 x i32>) #195declare <32 x i32> @llvm.hexagon.V6.vmpybus.acc(<32 x i32>, <16 x i32>, i32) #196declare <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32>, <16 x i32>, i32) #197declare <16 x i32> @llvm.hexagon.V6.vshuffob(<16 x i32>, <16 x i32>) #198 99attributes #0 = { nounwind "target-cpu"="hexagonv65" "target-features"="+hvxv65,+hvx-length64b" }100attributes #1 = { nounwind readnone }101attributes #2 = { nounwind }102