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1# REQUIRES: asserts2# RUN: llc --mtriple=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \3# RUN: -window-sched=force -filetype=null -verify-machineinstrs 2>&1 \4# RUN: | FileCheck %s5 6# CHECK: Best window offset is {{[0-9]+}} and Best II is {{[0-9]+}}.7 8--- |9  define void @exp_approx_top_six(i32 %N, ptr noalias %x, ptr noalias %y) #0 {10  entry:11    %is_zero = icmp eq i32 %N, 012    br i1 %is_zero, label %exit, label %loop_header13 14  loop_header:15    %vec_one = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1065353216)16    %vec_half = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1056964608)17    %vec_sixth = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1042983595)18    %vec_24th = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1026206379)19    %vec_120th = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1007192201)20    %vec_720th = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 985008993)21    br label %loop_body22 23  exit:24    ret void25 26  loop_body:27    %lsr.iv1 = phi ptr [ %cgep3, %loop_body ], [ %x, %loop_header ]28    %lsr.iv = phi ptr [ %cgep, %loop_body ], [ %y, %loop_header ]29    %index = phi i32 [ 0, %loop_header ], [ %index_next, %loop_body ]30    %vec_input = load <32 x i32>, ptr %lsr.iv1, align 12831    %vec_input_pow_2 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_input, <32 x i32> %vec_input)32    %vec_input_pow_3 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_input_pow_2, <32 x i32> %vec_input)33    %vec_input_pow_4 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_input_pow_3, <32 x i32> %vec_input)34    %vec_input_pow_5 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_input_pow_4, <32 x i32> %vec_input)35    %vec_input_pow_6 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_input_pow_5, <32 x i32> %vec_input)36    %vec_exp_approx_1 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_half, <32 x i32> %vec_input_pow_2)37    %vec_exp_approx_2 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sixth, <32 x i32> %vec_input_pow_3)38    %vec_exp_approx_3 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_24th, <32 x i32> %vec_input_pow_4)39    %vec_exp_approx_4 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_120th, <32 x i32> %vec_input_pow_5)40    %vec_exp_approx_5 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_720th, <32 x i32> %vec_input_pow_6)41    %vec_exp_sum_1 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_one, <32 x i32> %vec_input)42    %vec_exp_sum_2 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_exp_sum_1, <32 x i32> %vec_exp_approx_1)43    %vec_exp_sum_3 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_exp_sum_2, <32 x i32> %vec_exp_approx_2)44    %vec_exp_sum_4 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_exp_sum_3, <32 x i32> %vec_exp_approx_3)45    %vec_exp_sum_5 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_exp_sum_4, <32 x i32> %vec_exp_approx_4)46    %vec_exp_result = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_exp_sum_5, <32 x i32> %vec_exp_approx_5)47    store <32 x i32> %vec_exp_result, ptr %lsr.iv, align 12848    %index_next = add nuw i32 %index, 3249    %loop_cond = icmp ult i32 %index_next, %N50    %cgep = getelementptr i8, ptr %lsr.iv, i32 12851    %cgep3 = getelementptr i8, ptr %lsr.iv1, i32 12852    br i1 %loop_cond, label %loop_body, label %exit53  }54 55  declare <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32>, <32 x i32>)56  declare <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32)57  declare <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32>, <32 x i32>)58 59  attributes #0 = { "target-features"="+hvx-length128b,+hvxv69,+v66,-long-calls" }60...61---62name:            exp_approx_top_six63tracksRegLiveness: true64body:             |65  bb.0.entry:66    successors: %bb.2(0x30000000), %bb.1(0x50000000)67    liveins: $r0, $r1, $r268 69    %0:intregs = COPY $r270    %1:intregs = COPY $r171    %2:intregs = COPY $r072    %3:predregs = C2_cmpeqi %2, 073    J2_jumpt killed %3, %bb.2, implicit-def dead $pc74    J2_jump %bb.1, implicit-def dead $pc75 76  bb.1.loop_header:77    successors: %bb.3(0x80000000)78 79    %4:intregs = A2_tfrsi 106535321680    %5:hvxvr = V6_lvsplatw killed %481    %6:intregs = A2_tfrsi 105696460882    %7:hvxvr = V6_lvsplatw killed %683    %8:intregs = A2_tfrsi 104298359584    %9:hvxvr = V6_lvsplatw killed %885    %10:intregs = A2_tfrsi 102620637986    %11:hvxvr = V6_lvsplatw killed %1087    %12:intregs = A2_tfrsi 100719220188    %13:hvxvr = V6_lvsplatw killed %1289    %14:intregs = A2_tfrsi 98500899390    %15:hvxvr = V6_lvsplatw killed %1491    %16:intregs = A2_addi %2, 3192    %17:intregs = S2_lsr_i_r %16, 593    %18:intregs = COPY %1794    J2_loop0r %bb.3, %18, implicit-def $lc0, implicit-def $sa0, implicit-def $usr95    J2_jump %bb.3, implicit-def dead $pc96 97  bb.2.exit:98    PS_jmpret $r31, implicit-def dead $pc99 100  bb.3.loop_body (machine-block-address-taken):101    successors: %bb.3(0x7c000000), %bb.2(0x04000000)102 103    %19:intregs = PHI %1, %bb.1, %20, %bb.3104    %21:intregs = PHI %0, %bb.1, %22, %bb.3105    %23:hvxvr, %20:intregs = V6_vL32b_pi %19, 128 :: (load (s1024) from %ir.lsr.iv1)106    %24:hvxvr = V6_vmpyowh_rnd %23, %23107    %25:hvxvr = V6_vmpyowh_rnd %24, %23108    %26:hvxvr = V6_vmpyowh_rnd %25, %23109    %27:hvxvr = V6_vmpyowh_rnd %26, %23110    %28:hvxvr = V6_vmpyowh_rnd %27, %23111    %29:hvxvr = V6_vmpyowh_rnd %7, %24112    %30:hvxvr = V6_vmpyowh_rnd %9, %25113    %31:hvxvr = V6_vmpyowh_rnd %11, %26114    %32:hvxvr = V6_vmpyowh_rnd %13, %27115    %33:hvxvr = V6_vmpyowh_rnd %15, killed %28116    %34:hvxvr = V6_vaddw %5, %23117    %35:hvxvr = V6_vaddw killed %34, killed %29118    %36:hvxvr = V6_vaddw killed %35, killed %30119    %37:hvxvr = V6_vaddw killed %36, killed %31120    %38:hvxvr = V6_vaddw killed %37, killed %32121    %39:hvxvr = V6_vaddw killed %38, killed %33122    %22:intregs = V6_vS32b_pi %21, 128, killed %39 :: (store (s1024) into %ir.lsr.iv)123    ENDLOOP0 %bb.3, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0124    J2_jump %bb.2, implicit-def dead $pc125...126