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1# REQUIRES: asserts2# RUN: llc --mtriple=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \3# RUN: -window-sched=force -filetype=null -verify-machineinstrs 2>&1 \4# RUN: | FileCheck %s5 6# CHECK: Best window offset is {{[0-9]+}} and Best II is {{[0-9]+}}.7 8--- |9 define void @sqrt_approx(i32 noundef %N, ptr noalias %x, ptr noalias %y) #0 {10 entry:11 %isZeroLength = icmp eq i32 %N, 012 br i1 %isZeroLength, label %loop.exit, label %loop.preheader13 14 loop.preheader: ; preds = %entry15 %half_splat = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1056964608)16 %one_splat = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1065353216)17 %two_splat = tail call <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32 1073741824)18 br label %loop.body19 20 loop.exit: ; preds = %loop.body, %entry21 ret void22 23 loop.body: ; preds = %loop.body, %loop.preheader24 %lsr.iv1 = phi ptr [ %cgep3, %loop.body ], [ %x, %loop.preheader ]25 %lsr.iv = phi ptr [ %cgep, %loop.body ], [ %y, %loop.preheader ]26 %index = phi i32 [ 0, %loop.preheader ], [ %index.next, %loop.body ]27 %vec_x = load <32 x i32>, ptr %lsr.iv1, align 12828 %vec_sqrt_1 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %one_splat, <32 x i32> %vec_x)29 %vec_sqrt_2 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_1, <32 x i32> %half_splat)30 %vec_recip_1 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_2, <32 x i32> %half_splat)31 %vec_recip_2 = tail call <32 x i32> @llvm.hexagon.V6.vsubw.128B(<32 x i32> %two_splat, <32 x i32> %vec_recip_1)32 %vec_y1 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_2, <32 x i32> %vec_recip_2)33 %vec_recip_3 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_2, <32 x i32> %vec_y1)34 %vec_recop_4 = tail call <32 x i32> @llvm.hexagon.V6.vsubw.128B(<32 x i32> %two_splat, <32 x i32> %vec_recip_3)35 %vec_y2 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_y1, <32 x i32> %vec_recop_4)36 %vec_sqrt_3 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_x, <32 x i32> %vec_y2)37 %vec_sqrt_4 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_y2, <32 x i32> %vec_sqrt_3)38 %vec_sqrt_5 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_4, <32 x i32> %half_splat)39 %vec_recip_5 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_5, <32 x i32> %half_splat)40 %vec_recip_6 = tail call <32 x i32> @llvm.hexagon.V6.vsubw.128B(<32 x i32> %two_splat, <32 x i32> %vec_recip_5)41 %vec_y3 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_5, <32 x i32> %vec_recip_6)42 %vec_recip_7 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_5, <32 x i32> %vec_y3)43 %vec_recop_8 = tail call <32 x i32> @llvm.hexagon.V6.vsubw.128B(<32 x i32> %two_splat, <32 x i32> %vec_recip_7)44 %vec_y4 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_y3, <32 x i32> %vec_recop_8)45 %vec_sqrt_7 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_x, <32 x i32> %vec_y4)46 %vec_sqrt_8 = tail call <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32> %vec_y4, <32 x i32> %vec_sqrt_7)47 %vec_sqrt_9 = tail call <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32> %vec_sqrt_8, <32 x i32> %half_splat)48 store <32 x i32> %vec_sqrt_9, ptr %lsr.iv, align 12849 %index.next = add nuw i32 %index, 3250 %continue = icmp ult i32 %index.next, %N51 %cgep = getelementptr i8, ptr %lsr.iv, i32 12852 %cgep3 = getelementptr i8, ptr %lsr.iv1, i32 12853 br i1 %continue, label %loop.body, label %loop.exit54 }55 56 declare <32 x i32> @llvm.hexagon.V6.lvsplatw.128B(i32)57 declare <32 x i32> @llvm.hexagon.V6.vmpyowh.rnd.128B(<32 x i32>, <32 x i32>)58 declare <32 x i32> @llvm.hexagon.V6.vaddw.128B(<32 x i32>, <32 x i32>)59 declare <32 x i32> @llvm.hexagon.V6.vsubw.128B(<32 x i32>, <32 x i32>)60 61 attributes #0 = { "target-features"="+hvx-length128b,+hvxv69,+v66,-long-calls" }62...63---64name: sqrt_approx65tracksRegLiveness: true66body: |67 bb.0.entry:68 successors: %bb.2(0x30000000), %bb.1(0x50000000)69 liveins: $r0, $r1, $r270 71 %0:intregs = COPY $r272 %1:intregs = COPY $r173 %2:intregs = COPY $r074 %3:predregs = C2_cmpeqi %2, 075 J2_jumpt killed %3, %bb.2, implicit-def dead $pc76 J2_jump %bb.1, implicit-def dead $pc77 78 bb.1.loop.preheader:79 successors: %bb.3(0x80000000)80 81 %4:intregs = A2_tfrsi 105696460882 %5:hvxvr = V6_lvsplatw killed %483 %6:intregs = A2_tfrsi 106535321684 %7:hvxvr = V6_lvsplatw killed %685 %8:intregs = A2_tfrsi 107374182486 %9:hvxvr = V6_lvsplatw killed %887 %10:intregs = A2_addi %2, 3188 %11:intregs = S2_lsr_i_r %10, 589 %12:intregs = COPY %1190 J2_loop0r %bb.3, %12, implicit-def $lc0, implicit-def $sa0, implicit-def $usr91 J2_jump %bb.3, implicit-def dead $pc92 93 bb.2.loop.exit:94 PS_jmpret $r31, implicit-def dead $pc95 96 bb.3.loop.body (machine-block-address-taken):97 successors: %bb.3(0x7c000000), %bb.2(0x04000000)98 99 %13:intregs = PHI %1, %bb.1, %14, %bb.3100 %15:intregs = PHI %0, %bb.1, %16, %bb.3101 %17:hvxvr, %14:intregs = V6_vL32b_pi %13, 128 :: (load (s1024) from %ir.lsr.iv1)102 %18:hvxvr = V6_vaddw %7, %17103 %19:hvxvr = V6_vmpyowh_rnd killed %18, %5104 %20:hvxvr = V6_vmpyowh_rnd %19, %5105 %21:hvxvr = V6_vsubw %9, killed %20106 %22:hvxvr = V6_vmpyowh_rnd %19, killed %21107 %23:hvxvr = V6_vmpyowh_rnd %19, %22108 %24:hvxvr = V6_vsubw %9, killed %23109 %25:hvxvr = V6_vmpyowh_rnd %22, killed %24110 %26:hvxvr = V6_vmpyowh_rnd %17, %25111 %27:hvxvr = V6_vaddw %25, killed %26112 %28:hvxvr = V6_vmpyowh_rnd killed %27, %5113 %29:hvxvr = V6_vmpyowh_rnd %28, %5114 %30:hvxvr = V6_vsubw %9, killed %29115 %31:hvxvr = V6_vmpyowh_rnd %28, killed %30116 %32:hvxvr = V6_vmpyowh_rnd %28, %31117 %33:hvxvr = V6_vsubw %9, killed %32118 %34:hvxvr = V6_vmpyowh_rnd %31, killed %33119 %35:hvxvr = V6_vmpyowh_rnd %17, %34120 %36:hvxvr = V6_vaddw %34, killed %35121 %37:hvxvr = V6_vmpyowh_rnd killed %36, %5122 %16:intregs = V6_vS32b_pi %15, 128, killed %37 :: (store (s1024) into %ir.lsr.iv)123 ENDLOOP0 %bb.3, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0124 J2_jump %bb.2, implicit-def dead $pc125...126