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1; RUN: llc -mtriple=hexagon -enable-pipeliner -debug-only=pipeliner < %s -o - 2>&1 > /dev/null | FileCheck %s2; REQUIRES: asserts3 4; Fix bug when pipelining xxh benchmark at O3, mv55, and with vectorization.5; The problem is choosing the correct name for the Phis in the epilog.6 7; CHECK: New block8; CHECK: %{{.*}}, %[[REG:([0-9]+)]]{{.*}} = L2_loadri_pi9; CHECK: epilog:10; CHECK: = PHI11; CHECK-NOT: = PHI %{{[0-9]+}}, {{.*}}, %[[REG]]12; CHECK: = PHI13 14; Function Attrs: nounwind15define void @f0(i32 %a0, ptr %a1) #0 {16b0:17 %v0 = ashr i32 %a0, 118 br label %b119 20b1: ; preds = %b1, %b021 %v1 = phi i64 [ %v8, %b1 ], [ undef, %b0 ]22 %v2 = phi i32 [ %v9, %b1 ], [ 0, %b0 ]23 %v3 = phi i32 [ %v7, %b1 ], [ undef, %b0 ]24 %v4 = inttoptr i32 %v3 to ptr25 %v5 = load i32, ptr %v4, align 4, !tbaa !026 %v6 = tail call i64 @llvm.hexagon.S2.packhl(i32 %v5, i32 undef)27 %v7 = add nsw i32 %v3, -1628 %v8 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v1, i64 undef, i64 %v6)29 %v9 = add nsw i32 %v2, 130 %v10 = icmp eq i32 %v9, %v031 br i1 %v10, label %b2, label %b132 33b2: ; preds = %b134 %v11 = trunc i64 %v8 to i3235 %v12 = getelementptr inbounds i32, ptr %a1, i32 836 store i32 %v11, ptr %v12, align 4, !tbaa !037 call void @llvm.trap()38 unreachable39}40 41; Function Attrs: nounwind readnone42declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #143 44; Function Attrs: nounwind readnone45declare i64 @llvm.hexagon.S2.packhl(i32, i32) #146 47; Function Attrs: noreturn nounwind48declare void @llvm.trap() #249 50attributes #0 = { nounwind "target-cpu"="hexagonv55" }51attributes #1 = { nounwind readnone }52attributes #2 = { noreturn nounwind }53 54!0 = !{!1, !1, i64 0}55!1 = !{!"int", !2, i64 0}56!2 = !{!"omnipotent char", !3, i64 0}57!3 = !{!"Simple C/C++ TBAA"}58