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1; RUN: llc -mtriple=hexagon -disable-hexagon-peephole < %s | FileCheck %s2 3; Test that we're generating a 32-bit multiply high instead of a 64-bit version,4; when using the high 32-bits only.5 6; CHECK-LABEL: f0:7; CHECK-NOT: r{{[0-9]+}}:{{[0-9]+}} = mpy(8define void @f0(ptr nocapture readonly %a0, ptr nocapture %a1) #0 {9b0:10 %v0 = getelementptr i32, ptr %a1, i32 44811 br label %b112 13b1: ; preds = %b1, %b014 br i1 undef, label %b2, label %b115 16b2: ; preds = %b117 %v1 = getelementptr inbounds i32, ptr %a0, i32 6418 %v2 = load i32, ptr %a0, align 419 %v3 = getelementptr inbounds i32, ptr %a0, i32 220 %v4 = load i32, ptr %v1, align 421 %v5 = sext i32 %v2 to i6422 %v6 = sext i32 %v4 to i6423 %v7 = mul nsw i64 %v6, %v524 %v8 = lshr i64 %v7, 3225 %v9 = trunc i64 %v8 to i3226 %v10 = sub nsw i32 0, %v927 %v11 = getelementptr inbounds i32, ptr %v0, i32 128 store i32 %v10, ptr %v1, align 429 ret void30}31 32; Similar to above, but using the operands of the multiply are expressions.33 34; CHECK-LABEL: f1:35; CHECK: r{{[0-9]+}} = mpy(36define void @f1(i32 %a0, i32 %a1, ptr nocapture readonly %a2, ptr nocapture %a3) #0 {37b0:38 %v0 = getelementptr i32, ptr %a3, i32 44839 br label %b140 41b1: ; preds = %b1, %b042 br i1 undef, label %b2, label %b143 44b2: ; preds = %b145 %v1 = getelementptr inbounds i32, ptr %a2, i32 6446 %v2 = sext i32 %a0 to i6447 %v3 = sext i32 %a1 to i6448 %v4 = mul nsw i64 %v3, %v249 %v5 = lshr i64 %v4, 3250 %v6 = trunc i64 %v5 to i3251 %v7 = sub nsw i32 0, %v652 %v8 = getelementptr inbounds i32, ptr %v0, i32 153 store i32 %v7, ptr %v1, align 454 ret void55}56 57; Check that the transform occurs when the loads can be post-incremented.58 59; CHECK-LABEL: f2:60; CHECK: r{{[0-9]+}} = mpy(61define void @f2(ptr nocapture readonly %a0, ptr nocapture %a1) #0 {62b0:63 %v0 = getelementptr i32, ptr %a1, i32 44864 br label %b165 66b1: ; preds = %b067 %v1 = getelementptr inbounds i32, ptr %a0, i32 6468 br label %b269 70b2: ; preds = %b2, %b171 %v2 = phi ptr [ %v0, %b1 ], [ %v14, %b2 ]72 %v3 = phi ptr [ %v1, %b1 ], [ poison, %b2 ]73 %v4 = phi ptr [ null, %b1 ], [ %v6, %b2 ]74 %v5 = load i32, ptr %v4, align 475 %v6 = getelementptr inbounds i32, ptr %v4, i32 276 %v7 = load i32, ptr %v3, align 477 %v8 = sext i32 %v5 to i6478 %v9 = sext i32 %v7 to i6479 %v10 = mul nsw i64 %v9, %v880 %v11 = lshr i64 %v10, 3281 %v12 = trunc i64 %v11 to i3282 %v13 = sub nsw i32 0, %v1283 %v14 = getelementptr inbounds i32, ptr %v2, i32 184 store i32 %v13, ptr %v2, align 485 br label %b286}87 88attributes #0 = { nounwind "target-cpu"="hexagonv55" }89