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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3target triple = "hexagon"4 5; CHECK-LABEL: f0:6; CHECK: r{{[0-9]+}} = cmpyiwh(r{{[0-9]}}:{{[0-9]}},r{{[0-9]+}}*):<<1:rnd:sat7define i32 @f0(double %a0) {8b0:9 %v0 = alloca i8, align 110 %v1 = fptosi double %a0 to i6411 %v2 = tail call i32 @llvm.hexagon.M4.cmpyi.whc(i64 %v1, i32 512)12 %v3 = trunc i32 %v2 to i813 store volatile i8 %v3, ptr %v0, align 114 %v4 = load volatile i8, ptr %v0, align 115 %v5 = zext i8 %v4 to i3216 ret i32 %v517}18 19; Function Attrs: nounwind readnone20declare i32 @llvm.hexagon.M4.cmpyi.whc(i64, i32) #021 22; CHECK-LABEL: f1:23; CHECK: r{{[0-9]+}} = cmpyrwh(r{{[0-9]}}:{{[0-9]}},r{{[0-9]+}}*):<<1:rnd:sat24define i32 @f1(double %a0) {25b0:26 %v0 = alloca i8, align 127 %v1 = fptosi double %a0 to i6428 %v2 = tail call i32 @llvm.hexagon.M4.cmpyr.whc(i64 %v1, i32 512)29 %v3 = trunc i32 %v2 to i830 store volatile i8 %v3, ptr %v0, align 131 %v4 = load volatile i8, ptr %v0, align 132 %v5 = zext i8 %v4 to i3233 ret i32 %v534}35 36; Function Attrs: nounwind readnone37declare i32 @llvm.hexagon.M4.cmpyr.whc(i64, i32) #038 39; CHECK-LABEL: f2:40; CHECK: r{{[0-9]+}} = popcount(r{{[0-9]}}:{{[0-9]}})41define i32 @f2(double %a0) {42b0:43 %v0 = alloca i8, align 144 %v1 = fptosi double %a0 to i6445 %v2 = tail call i32 @llvm.hexagon.S5.popcountp(i64 %v1)46 %v3 = trunc i32 %v2 to i847 store volatile i8 %v3, ptr %v0, align 148 %v4 = load volatile i8, ptr %v0, align 149 %v5 = zext i8 %v4 to i3250 ret i32 %v551}52 53; Function Attrs: nounwind readnone54declare i32 @llvm.hexagon.S5.popcountp(i64) #055 56; CHECK-LABEL: f3:57; CHECK: p{{[0-3]+}} = sfclass(r{{[0-9]}},#3)58define i32 @f3(float %a0) {59b0:60 %v0 = alloca i8, align 161 %v1 = tail call i32 @llvm.hexagon.F2.sfclass(float %a0, i32 3)62 %v2 = trunc i32 %v1 to i863 store volatile i8 %v2, ptr %v0, align 164 %v3 = load volatile i8, ptr %v0, align 165 %v4 = zext i8 %v3 to i3266 ret i32 %v467}68 69; Function Attrs: readnone70declare i32 @llvm.hexagon.F2.sfclass(float, i32) #171 72; CHECK-LABEL: f4:73; CHECK: r{{[0-9]+}} = vasrhub(r{{[0-9]}}:{{[0-9]}},#3):sat74define i32 @f4(float %a0) {75b0:76 %v0 = alloca i8, align 177 %v1 = fptosi float %a0 to i6478 %v2 = tail call i32 @llvm.hexagon.S5.asrhub.sat(i64 %v1, i32 3)79 %v3 = trunc i32 %v2 to i880 store volatile i8 %v3, ptr %v0, align 181 %v4 = load volatile i8, ptr %v0, align 182 %v5 = zext i8 %v4 to i3283 ret i32 %v584}85 86; Function Attrs: nounwind readnone87declare i32 @llvm.hexagon.S5.asrhub.sat(i64, i32) #088 89attributes #0 = { nounwind readnone }90attributes #1 = { readnone }91