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1; RUN: llc -mtriple=hexagon -O2 -disable-hexagon-shuffle=1 < %s | FileCheck %s2; CHECK: vmemu(r{{[0-9]}}+#0) = v{{[0-9]*}}3 4target triple = "hexagon"5 6; Function Attrs: nounwind7define void @f0(ptr %a0, ptr %a1) #0 {8b0:9 %v0 = alloca ptr, align 410 %v1 = alloca ptr, align 411 %v2 = alloca <16 x i32>, align 6412 store ptr %a0, ptr %v0, align 413 store ptr %a1, ptr %v1, align 414 %v3 = load ptr, ptr %v0, align 415 %v4 = load <16 x i32>, ptr %v2, align 6416 call void asm sideeffect " $1 = vmemu($0);\0A", "r,v"(ptr %v3, <16 x i32> %v4) #1, !srcloc !017 %v5 = load ptr, ptr %v1, align 418 %v6 = load <16 x i32>, ptr %v2, align 6419 call void asm sideeffect " vmemu($0) = $1;\0A", "r,v,~{memory}"(ptr %v5, <16 x i32> %v6) #1, !srcloc !120 ret void21}22 23; Function Attrs: nounwind24define i32 @f1() #0 {25b0:26 ret i32 027}28 29attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }30attributes #1 = { nounwind }31 32!0 = !{i32 233}33!1 = !{i32 307}34