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1; RUN: llc -mtriple=hexagon -O2 -pipeliner-max-mii=10 < %s -verify-machineinstrs | FileCheck %s2; CHECK-NOT: vmemu3 4; Function Attrs: nounwind5define void @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3, ptr nocapture %a4, ptr nocapture %a5) #0 {6b0:7 %v0 = tail call i32 @llvm.hexagon.S2.vsplatrb(i32 %a3)8 %v1 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 %v0)9 %v2 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 16843009)10 %v3 = tail call <16 x i32> @llvm.hexagon.V6.vd0()11 %v4 = sdiv i32 %a2, 6412 %v5 = icmp sgt i32 %a2, 6313 br i1 %v5, label %b1, label %b614 15b1: ; preds = %b016 %v8 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v3, <16 x i32> %v3)17 br label %b218 19b2: ; preds = %b4, %b120 %v9 = phi i32 [ 0, %b1 ], [ %v100, %b4 ]21 %v10 = phi ptr [ %a0, %b1 ], [ %v87, %b4 ]22 %v11 = phi ptr [ %a5, %b1 ], [ %v99, %b4 ]23 %v12 = phi ptr [ %a4, %b1 ], [ %v95, %b4 ]24 %v14 = load <16 x i32>, ptr %v10, align 64, !tbaa !025 br label %b326 27b3: ; preds = %b3, %b228 %v15 = phi i32 [ -4, %b2 ], [ %v83, %b3 ]29 %v16 = phi <32 x i32> [ %v8, %b2 ], [ %v78, %b3 ]30 %v17 = phi <16 x i32> [ %v3, %b2 ], [ %v82, %b3 ]31 %v18 = mul nsw i32 %v15, %a132 %v19 = getelementptr inbounds i8, ptr %v10, i32 %v1833 %v21 = add i32 %v18, -6434 %v22 = getelementptr inbounds i8, ptr %v10, i32 %v2135 %v24 = load <16 x i32>, ptr %v22, align 64, !tbaa !036 %v25 = load <16 x i32>, ptr %v19, align 64, !tbaa !037 %v26 = add i32 %v18, 6438 %v27 = getelementptr inbounds i8, ptr %v10, i32 %v2639 %v29 = load <16 x i32>, ptr %v27, align 64, !tbaa !040 %v30 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v25, <16 x i32> %v14)41 %v31 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v30, <16 x i32> %v1)42 %v32 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v31, <16 x i32> %v3, <16 x i32> %v25)43 %v33 = tail call <32 x i32> @llvm.hexagon.V6.vmpybus.acc(<32 x i32> %v16, <16 x i32> %v32, i32 16843009)44 %v34 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v31, <16 x i32> %v17, <16 x i32> %v2)45 %v35 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v25, <16 x i32> %v24, i32 1)46 %v36 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v29, <16 x i32> %v25, i32 1)47 %v37 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v25, <16 x i32> %v24, i32 2)48 %v38 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v29, <16 x i32> %v25, i32 2)49 %v39 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v35, <16 x i32> %v14)50 %v40 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v36, <16 x i32> %v14)51 %v41 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v37, <16 x i32> %v14)52 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v38, <16 x i32> %v14)53 %v43 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v39, <16 x i32> %v1)54 %v44 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v40, <16 x i32> %v1)55 %v45 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v41, <16 x i32> %v1)56 %v46 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v42, <16 x i32> %v1)57 %v47 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v43, <16 x i32> %v3, <16 x i32> %v35)58 %v48 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v44, <16 x i32> %v3, <16 x i32> %v36)59 %v49 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v45, <16 x i32> %v3, <16 x i32> %v37)60 %v50 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v46, <16 x i32> %v3, <16 x i32> %v38)61 %v51 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v48, <16 x i32> %v47)62 %v52 = tail call <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32> %v33, <32 x i32> %v51, i32 16843009)63 %v53 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v50, <16 x i32> %v49)64 %v54 = tail call <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32> %v52, <32 x i32> %v53, i32 16843009)65 %v55 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v43, <16 x i32> %v34, <16 x i32> %v2)66 %v56 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v44, <16 x i32> %v55, <16 x i32> %v2)67 %v57 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v45, <16 x i32> %v56, <16 x i32> %v2)68 %v58 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v46, <16 x i32> %v57, <16 x i32> %v2)69 %v59 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v25, <16 x i32> %v24, i32 3)70 %v60 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v29, <16 x i32> %v25, i32 3)71 %v61 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v25, <16 x i32> %v24, i32 4)72 %v62 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v29, <16 x i32> %v25, i32 4)73 %v63 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v59, <16 x i32> %v14)74 %v64 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v60, <16 x i32> %v14)75 %v65 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v61, <16 x i32> %v14)76 %v66 = tail call <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32> %v62, <16 x i32> %v14)77 %v67 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v63, <16 x i32> %v1)78 %v68 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v64, <16 x i32> %v1)79 %v69 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v65, <16 x i32> %v1)80 %v70 = tail call <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32> %v66, <16 x i32> %v1)81 %v71 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v67, <16 x i32> %v3, <16 x i32> %v59)82 %v72 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v68, <16 x i32> %v3, <16 x i32> %v60)83 %v73 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v69, <16 x i32> %v3, <16 x i32> %v61)84 %v74 = tail call <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1> %v70, <16 x i32> %v3, <16 x i32> %v62)85 %v75 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v72, <16 x i32> %v71)86 %v76 = tail call <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32> %v54, <32 x i32> %v75, i32 16843009)87 %v77 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v74, <16 x i32> %v73)88 %v78 = tail call <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32> %v76, <32 x i32> %v77, i32 16843009)89 %v79 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v67, <16 x i32> %v58, <16 x i32> %v2)90 %v80 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v68, <16 x i32> %v79, <16 x i32> %v2)91 %v81 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v69, <16 x i32> %v80, <16 x i32> %v2)92 %v82 = tail call <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1> %v70, <16 x i32> %v81, <16 x i32> %v2)93 %v83 = add nsw i32 %v15, 194 %v84 = icmp eq i32 %v83, 595 br i1 %v84, label %b4, label %b396 97b4: ; preds = %b398 %v85 = phi <16 x i32> [ %v82, %b3 ]99 %v86 = phi <32 x i32> [ %v78, %b3 ]100 %v87 = getelementptr inbounds i8, ptr %v10, i32 64101 %v88 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v86)102 %v89 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v86)103 %v90 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> %v88, <16 x i32> %v89, i32 -2)104 %v91 = tail call <32 x i32> @llvm.hexagon.V6.vunpackub(<16 x i32> %v85)105 %v92 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v90)106 %v93 = getelementptr inbounds <16 x i32>, ptr %v12, i32 1107 store <16 x i32> %v92, ptr %v12, align 64, !tbaa !0108 %v94 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v90)109 %v95 = getelementptr inbounds <16 x i32>, ptr %v12, i32 2110 store <16 x i32> %v94, ptr %v93, align 64, !tbaa !0111 %v96 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v91)112 %v97 = getelementptr inbounds <16 x i32>, ptr %v11, i32 1113 store <16 x i32> %v96, ptr %v11, align 64, !tbaa !0114 %v98 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v91)115 %v99 = getelementptr inbounds <16 x i32>, ptr %v11, i32 2116 store <16 x i32> %v98, ptr %v97, align 64, !tbaa !0117 %v100 = add nsw i32 %v9, 1118 %v101 = icmp slt i32 %v100, %v4119 br i1 %v101, label %b2, label %b5120 121b5: ; preds = %b4122 br label %b6123 124b6: ; preds = %b5, %b0125 ret void126}127 128; Function Attrs: nounwind readnone129declare <16 x i32> @llvm.hexagon.V6.lvsplatw(i32) #1130 131; Function Attrs: nounwind readnone132declare i32 @llvm.hexagon.S2.vsplatrb(i32) #1133 134; Function Attrs: nounwind readnone135declare <16 x i32> @llvm.hexagon.V6.vd0() #1136 137; Function Attrs: nounwind readnone138declare <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32>, <16 x i32>) #1139 140; Function Attrs: nounwind readnone141declare <16 x i32> @llvm.hexagon.V6.vabsdiffub(<16 x i32>, <16 x i32>) #1142 143; Function Attrs: nounwind readnone144declare <64 x i1> @llvm.hexagon.V6.vgtub(<16 x i32>, <16 x i32>) #1145 146; Function Attrs: nounwind readnone147declare <16 x i32> @llvm.hexagon.V6.vmux(<64 x i1>, <16 x i32>, <16 x i32>) #1148 149; Function Attrs: nounwind readnone150declare <32 x i32> @llvm.hexagon.V6.vmpybus.acc(<32 x i32>, <16 x i32>, i32) #1151 152; Function Attrs: nounwind readnone153declare <16 x i32> @llvm.hexagon.V6.vaddbnq(<64 x i1>, <16 x i32>, <16 x i32>) #1154 155; Function Attrs: nounwind readnone156declare <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32>, <16 x i32>, i32) #1157 158; Function Attrs: nounwind readnone159declare <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32>, <16 x i32>, i32) #1160 161; Function Attrs: nounwind readnone162declare <32 x i32> @llvm.hexagon.V6.vmpabus.acc(<32 x i32>, <32 x i32>, i32) #1163 164; Function Attrs: nounwind readnone165declare <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32>, <16 x i32>, i32) #1166 167; Function Attrs: nounwind readnone168declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #1169 170; Function Attrs: nounwind readnone171declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #1172 173; Function Attrs: nounwind readnone174declare <32 x i32> @llvm.hexagon.V6.vunpackub(<16 x i32>) #1175 176; Function Attrs: nounwind177define void @f1(ptr nocapture readonly %a0, ptr nocapture readonly %a1, ptr nocapture readonly %a2, i32 %a3, ptr nocapture %a4) #0 {178b0:179 %v0 = tail call <16 x i32> @llvm.hexagon.V6.lvsplatw(i32 983055)180 %v1 = sdiv i32 %a3, 64181 %v2 = icmp sgt i32 %a3, 63182 br i1 %v2, label %b1, label %b4183 184b1: ; preds = %b0185 br label %b2186 187b2: ; preds = %b2, %b1188 %v7 = phi i32 [ 0, %b1 ], [ %v44, %b2 ]189 %v8 = phi ptr [ %a4, %b1 ], [ %v43, %b2 ]190 %v9 = phi ptr [ %a1, %b1 ], [ %v29, %b2 ]191 %v10 = phi ptr [ %a2, %b1 ], [ %v32, %b2 ]192 %v11 = phi ptr [ %a0, %b1 ], [ %v27, %b2 ]193 %v12 = getelementptr inbounds <16 x i32>, ptr %v11, i32 1194 %v13 = load <16 x i32>, ptr %v11, align 64, !tbaa !0195 %v14 = getelementptr inbounds <16 x i32>, ptr %v9, i32 1196 %v15 = load <16 x i32>, ptr %v9, align 64, !tbaa !0197 %v16 = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %v13, <16 x i32> %v15)198 %v17 = getelementptr inbounds <16 x i32>, ptr %v10, i32 1199 %v18 = load <16 x i32>, ptr %v10, align 64, !tbaa !0200 %v19 = tail call <32 x i32> @llvm.hexagon.V6.vaddhw(<16 x i32> %v18, <16 x i32> %v0)201 %v20 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v16)202 %v21 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v19)203 %v22 = tail call <16 x i32> @llvm.hexagon.V6.vlsrwv(<16 x i32> %v20, <16 x i32> %v21)204 %v23 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v16)205 %v24 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v19)206 %v25 = tail call <16 x i32> @llvm.hexagon.V6.vlsrwv(<16 x i32> %v23, <16 x i32> %v24)207 %v26 = tail call <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32> %v25, <16 x i32> %v22)208 %v27 = getelementptr inbounds <16 x i32>, ptr %v11, i32 2209 %v28 = load <16 x i32>, ptr %v12, align 64, !tbaa !0210 %v29 = getelementptr inbounds <16 x i32>, ptr %v9, i32 2211 %v30 = load <16 x i32>, ptr %v14, align 64, !tbaa !0212 %v31 = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %v28, <16 x i32> %v30)213 %v32 = getelementptr inbounds <16 x i32>, ptr %v10, i32 2214 %v33 = load <16 x i32>, ptr %v17, align 64, !tbaa !0215 %v34 = tail call <32 x i32> @llvm.hexagon.V6.vaddhw(<16 x i32> %v33, <16 x i32> %v0)216 %v35 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v31)217 %v36 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v34)218 %v37 = tail call <16 x i32> @llvm.hexagon.V6.vlsrwv(<16 x i32> %v35, <16 x i32> %v36)219 %v38 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v31)220 %v39 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v34)221 %v40 = tail call <16 x i32> @llvm.hexagon.V6.vlsrwv(<16 x i32> %v38, <16 x i32> %v39)222 %v41 = tail call <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32> %v40, <16 x i32> %v37)223 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vpackhub.sat(<16 x i32> %v41, <16 x i32> %v26)224 %v43 = getelementptr inbounds <16 x i32>, ptr %v8, i32 1225 store <16 x i32> %v42, ptr %v8, align 64, !tbaa !0226 %v44 = add nsw i32 %v7, 1227 %v45 = icmp slt i32 %v44, %v1228 br i1 %v45, label %b2, label %b3229 230b3: ; preds = %b2231 br label %b4232 233b4: ; preds = %b3, %b0234 ret void235}236 237; Function Attrs: nounwind readnone238declare <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32>, <16 x i32>) #1239 240; Function Attrs: nounwind readnone241declare <32 x i32> @llvm.hexagon.V6.vaddhw(<16 x i32>, <16 x i32>) #1242 243; Function Attrs: nounwind readnone244declare <16 x i32> @llvm.hexagon.V6.vlsrwv(<16 x i32>, <16 x i32>) #1245 246; Function Attrs: nounwind readnone247declare <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32>, <16 x i32>) #1248 249; Function Attrs: nounwind readnone250declare <16 x i32> @llvm.hexagon.V6.vpackhub.sat(<16 x i32>, <16 x i32>) #1251 252attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }253attributes #1 = { nounwind readnone }254 255!0 = !{!1, !1, i64 0}256!1 = !{!"omnipotent char", !2, i64 0}257!2 = !{!"Simple C/C++ TBAA"}258