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1; RUN: llc -mtriple=hexagon -disable-cgp-delete-phis < %s | FileCheck %s2 3; Test that we no longer generate an unaligned vector store for a spill when4; a function has an alloca.5 6; CHECK: vmem({{.*}}) =7 8%s.0 = type { [5 x [4 x i8]], i32, i32, i32, i32 }9 10; Function Attrs: nounwind11define i32 @f0(ptr nocapture readonly %a0, ptr nocapture %a1, ptr nocapture readonly %a2, ptr nocapture readonly %a3, i32 %a4, i32 %a5, i32 %a6, ptr nocapture readonly %a7) #0 {12b0:13 %v0 = alloca i8, i32 %a4, align 12814 br i1 undef, label %b1, label %b515 16b1: ; preds = %b017 %v1 = icmp sgt i32 %a5, 218 br label %b219 20b2: ; preds = %b3, %b2, %b121 br i1 undef, label %b3, label %b222 23b3: ; preds = %b224 call void @f1(ptr undef, ptr undef, ptr nonnull %v0, i32 %a4, i32 %a5, ptr %a7)25 %v2 = tail call <32 x i32> @llvm.hexagon.V6.vd0.128B() #226 br i1 %v1, label %b4, label %b227 28b4: ; preds = %b4, %b329 %v3 = phi <32 x i32> [ %v5, %b4 ], [ undef, %b3 ]30 %v4 = tail call <32 x i32> @llvm.hexagon.V6.vsubhnq.128B(<128 x i1> undef, <32 x i32> undef, <32 x i32> %v3) #231 %v5 = tail call <32 x i32> @llvm.hexagon.V6.vavguh.128B(<32 x i32> %v3, <32 x i32> %v2) #232 br label %b433 34b5: ; preds = %b035 ret i32 036}37 38; Function Attrs: nounwind39declare void @f1(ptr nocapture readonly, ptr nocapture readonly, ptr nocapture, i32, i32, ptr nocapture readonly) #040 41; Function Attrs: nounwind readnone42declare <32 x i32> @llvm.hexagon.V6.vd0.128B() #143 44; Function Attrs: nounwind readnone45declare <32 x i32> @llvm.hexagon.V6.vsubhnq.128B(<128 x i1>, <32 x i32>, <32 x i32>) #146 47; Function Attrs: nounwind readnone48declare <32 x i32> @llvm.hexagon.V6.vavguh.128B(<32 x i32>, <32 x i32>) #149 50attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" }51attributes #1 = { nounwind readnone }52attributes #2 = { nounwind }53