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1; RUN: llc -mtriple=hexagon -O2 -mcpu=hexagonv60 < %s | FileCheck %s2 3; CHECK: q{{[0-3]}} = vand(v{{[0-9]*}},r{{[0-9]*}})4target datalayout = "e-m:e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a:0-n16:32"5target triple = "hexagon"6 7@K = global i64 0, align 88@src = global i8 -1, align 19@vecpreds = common global [15 x <16 x i32>] zeroinitializer, align 6410@Q6VecPredResult = common global <16 x i32> zeroinitializer, align 6411@vectors = common global [15 x <16 x i32>] zeroinitializer, align 6412@VectorResult = common global <16 x i32> zeroinitializer, align 6413@vector_pairs = common global [15 x <32 x i32>] zeroinitializer, align 12814@VectorPairResult = common global <32 x i32> zeroinitializer, align 12815@dst_addresses = common global [15 x i8] zeroinitializer, align 816@ptr_addresses = common global [15 x ptr] zeroinitializer, align 817@src_addresses = common global [15 x ptr] zeroinitializer, align 818@dst = common global i8 0, align 119@ptr = common global [32768 x i8] zeroinitializer, align 820 21; Function Attrs: nounwind22define i32 @main() #0 {23entry:24 %retval = alloca i32, align 425 store i32 0, ptr %retval, align 426 %0 = load volatile <16 x i32>, ptr @vecpreds, align 6427 %1 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %0, i32 -1)28 %2 = load volatile <16 x i32>, ptr getelementptr inbounds ([15 x <16 x i32>], ptr @vecpreds, i32 0, i32 1), align 6429 %3 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %2, i32 -1)30 %4 = call <64 x i1> @llvm.hexagon.V6.pred.and(<64 x i1> %1, <64 x i1> %3)31 %5 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %4, i32 -1)32 store volatile <16 x i32> %5, ptr @Q6VecPredResult, align 6433 %6 = load volatile <16 x i32>, ptr @vecpreds, align 6434 %7 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %6, i32 -1)35 %8 = load volatile <16 x i32>, ptr getelementptr inbounds ([15 x <16 x i32>], ptr @vecpreds, i32 0, i32 1), align 6436 %9 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> %8, i32 -1)37 %10 = call <64 x i1> @llvm.hexagon.V6.pred.and.n(<64 x i1> %7, <64 x i1> %9)38 %11 = tail call <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1> %10, i32 -1)39 store volatile <16 x i32> %11, ptr @Q6VecPredResult, align 6440 ret i32 041 42}43 44; Function Attrs: nounwind readnone45declare <64 x i1> @llvm.hexagon.V6.pred.and(<64 x i1>, <64 x i1>) #146 47; Function Attrs: nounwind readnone48declare <64 x i1> @llvm.hexagon.V6.pred.and.n(<64 x i1>, <64 x i1>) #149 50; Function Attrs: nounwind readnone51declare <16 x i32> @llvm.hexagon.V6.vandqrt(<64 x i1>, i32) #152 53; Function Attrs: nounwind readnone54declare <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32>, i32) #155 56attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" "unsafe-fp-math"="false" "use-soft-float"="false" }57attributes #1 = { nounwind readnone }58