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1; RUN: llc -mtriple=hexagon -O0 < %s | FileCheck %s2; generate vmems for W_equals_W (vassignp)3; CHECK: vmem4; CHECK: vmem5; CHECK: vmem6; CHECK: vmem7 8target triple = "hexagon"9 10@g0 = common global [15 x <32 x i32>] zeroinitializer, align 6411@g1 = common global <32 x i32> zeroinitializer, align 6412 13; Function Attrs: nounwind14define i32 @f0() #0 {15b0:16 %v0 = alloca i32, align 417 %v1 = alloca i32, align 418 store i32 0, ptr %v019 store i32 0, ptr %v1, align 420 %v2 = load <32 x i32>, ptr @g0, align 6421 %v3 = call <32 x i32> @llvm.hexagon.V6.vassignp(<32 x i32> %v2)22 store <32 x i32> %v3, ptr @g1, align 6423 ret i32 024}25 26; Function Attrs: nounwind readnone27declare <32 x i32> @llvm.hexagon.V6.vassignp(<32 x i32>) #128 29attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }30attributes #1 = { nounwind readnone }31