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1; RUN: llc -mtriple=hexagon < %s | FileCheck %s2 3; Test that we generate a post-increment when using double hvx (128B)4; post-increment operations.5 6; CHECK: = vmem(r{{[0-9]+}}++#1)7; CHECK: vmem(r{{[0-9]+}}++#1)8 9; Function Attrs: nounwind10define void @f0(ptr noalias nocapture readonly %a0, ptr noalias nocapture %a1, i32 %a2) #0 {11b0:12 %v0 = icmp sgt i32 %a2, 013 br i1 %v0, label %b1, label %b314 15b1: ; preds = %b016 br label %b217 18b2: ; preds = %b2, %b119 %v3 = phi ptr [ %v9, %b2 ], [ %a0, %b1 ]20 %v4 = phi ptr [ %v10, %b2 ], [ %a1, %b1 ]21 %v5 = phi i32 [ %v7, %b2 ], [ 0, %b1 ]22 %v6 = load <32 x i32>, ptr %v3, align 128, !tbaa !023 store <32 x i32> %v6, ptr %v4, align 128, !tbaa !024 %v7 = add nsw i32 %v5, 125 %v8 = icmp eq i32 %v7, %a226 %v9 = getelementptr <32 x i32>, ptr %v3, i32 127 %v10 = getelementptr <32 x i32>, ptr %v4, i32 128 br i1 %v8, label %b3, label %b229 30b3: ; preds = %b2, %b031 ret void32}33 34attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" }35 36!0 = !{!1, !1, i64 0}37!1 = !{!"omnipotent char", !2, i64 0}38!2 = !{!"Simple C/C++ TBAA"}39