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1# RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128b \2# RUN: -run-pass hexagon-qfp-optimizer -disable-qfp-opt-mul=false %s -o - | FileCheck %s --check-prefix=MUL-ENABLED3# RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128b \4# RUN: -run-pass hexagon-qfp-optimizer %s -o - | FileCheck %s --check-prefix=DEFAULT5# MUL-ENABLED-LABEL: name: qfpAdd326# MUL-ENABLED: V6_vconv_sf_qf327# MUL-ENABLED-NEXT: V6_vadd_qf32_mix8# MUL-ENABLED-NEXT: V6_vconv_sf_qf329# MUL-ENABLED-NEXT: V6_vS32Ub_ai10# MUL-ENABLED-NEXT: V6_vadd_qf3211# DEFAULT-LABEL: name: qfpAdd3212# DEFAULT: V6_vconv_sf_qf3213# DEFAULT-NEXT: V6_vadd_qf32_mix14# DEFAULT-NEXT: V6_vconv_sf_qf3215# DEFAULT-NEXT: V6_vS32Ub_ai16# DEFAULT-NEXT: V6_vadd_qf3217---18name: qfpAdd3219tracksRegLiveness: true20body: |21 bb.0:22 liveins: $r0, $r1, $r2, $r323 %0:intregs = COPY $r024 %1:intregs = COPY $r125 %2:intregs = COPY $r226 %3:intregs = COPY $r327 %4:hvxvr = V6_vL32Ub_ai %0:intregs, 028 %5:hvxvr = V6_vL32Ub_ai %1:intregs, 029 %6:hvxvr = V6_vadd_sf %4:hvxvr, %5:hvxvr30 %7:hvxvr = V6_vconv_sf_qf32 %6:hvxvr31 %8:hvxvr = V6_vadd_sf %5:hvxvr, %7:hvxvr32 %9:hvxvr = V6_vconv_sf_qf32 %8:hvxvr33 V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr34 %10:hvxvr = V6_vadd_sf %7:hvxvr, %9:hvxvr35 %11:hvxvr = V6_vconv_sf_qf32 %10:hvxvr36 V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr37...38# MUL-ENABLED-LABEL: name: qfpAdd1639# MUL-ENABLED: V6_vconv_hf_qf1640# MUL-ENABLED-NEXT: V6_vadd_qf16_mix41# MUL-ENABLED-NEXT: V6_vconv_hf_qf1642# MUL-ENABLED-NEXT: V6_vS32Ub_ai43# MUL-ENABLED-NEXT: V6_vadd_qf1644# DEFAULT-LABEL: name: qfpAdd1645# DEFAULT: V6_vconv_hf_qf1646# DEFAULT-NEXT: V6_vadd_qf16_mix47# DEFAULT-NEXT: V6_vconv_hf_qf1648# DEFAULT-NEXT: V6_vS32Ub_ai49# DEFAULT-NEXT: V6_vadd_qf1650---51name: qfpAdd1652tracksRegLiveness: true53body: |54 bb.0:55 liveins: $r0, $r1, $r2, $r356 %0:intregs = COPY $r057 %1:intregs = COPY $r158 %2:intregs = COPY $r259 %3:intregs = COPY $r360 %4:hvxvr = V6_vL32Ub_ai %0:intregs, 061 %5:hvxvr = V6_vL32Ub_ai %1:intregs, 062 %6:hvxvr = V6_vadd_hf %4:hvxvr, %5:hvxvr63 %7:hvxvr = V6_vconv_hf_qf16 %6:hvxvr64 %8:hvxvr = V6_vadd_hf %5:hvxvr, %7:hvxvr65 %9:hvxvr = V6_vconv_hf_qf16 %8:hvxvr66 V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr67 %10:hvxvr = V6_vadd_hf %7:hvxvr, %9:hvxvr68 %11:hvxvr = V6_vconv_hf_qf16 %10:hvxvr69 V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr70...71# MUL-ENABLED-LABEL: name: qfpSub3272# MUL-ENABLED: V6_vconv_sf_qf3273# MUL-ENABLED-NEXT: V6_vsub_qf32_mix74# MUL-ENABLED-NEXT: V6_vconv_sf_qf3275# MUL-ENABLED-NEXT: V6_vS32Ub_ai76# MUL-ENABLED-NEXT: V6_vsub_qf3277# DEFAULT-LABEL: name: qfpSub3278# DEFAULT: V6_vconv_sf_qf3279# DEFAULT-NEXT: V6_vsub_qf32_mix80# DEFAULT-NEXT: V6_vconv_sf_qf3281# DEFAULT-NEXT: V6_vS32Ub_ai82# DEFAULT-NEXT: V6_vsub_qf3283---84name: qfpSub3285tracksRegLiveness: true86body: |87 bb.0:88 liveins: $r0, $r1, $r2, $r389 %0:intregs = COPY $r090 %1:intregs = COPY $r191 %2:intregs = COPY $r292 %3:intregs = COPY $r393 %4:hvxvr = V6_vL32Ub_ai %0:intregs, 094 %5:hvxvr = V6_vL32Ub_ai %1:intregs, 095 %6:hvxvr = V6_vsub_sf %4:hvxvr, %5:hvxvr96 %7:hvxvr = V6_vconv_sf_qf32 %6:hvxvr97 %8:hvxvr = V6_vsub_sf %7:hvxvr, %5:hvxvr98 %9:hvxvr = V6_vconv_sf_qf32 %8:hvxvr99 V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr100 %10:hvxvr = V6_vsub_sf %7:hvxvr, %9:hvxvr101 %11:hvxvr = V6_vconv_sf_qf32 %10:hvxvr102 V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr103...104# MUL-ENABLED-LABEL: name: qfpSub16105# MUL-ENABLED: V6_vconv_hf_qf16106# MUL-ENABLED-NEXT: V6_vsub_qf16_mix107# MUL-ENABLED-NEXT: V6_vconv_hf_qf16108# MUL-ENABLED-NEXT: V6_vS32Ub_ai109# MUL-ENABLED-NEXT: V6_vsub_qf16110# DEFAULT-LABEL: name: qfpSub16111# DEFAULT: V6_vconv_hf_qf16112# DEFAULT-NEXT: V6_vsub_qf16_mix113# DEFAULT-NEXT: V6_vconv_hf_qf16114# DEFAULT-NEXT: V6_vS32Ub_ai115# DEFAULT-NEXT: V6_vsub_qf16116---117name: qfpSub16118tracksRegLiveness: true119body: |120 bb.0:121 liveins: $r0, $r1, $r2, $r3122 %0:intregs = COPY $r0123 %1:intregs = COPY $r1124 %2:intregs = COPY $r2125 %3:intregs = COPY $r3126 %4:hvxvr = V6_vL32Ub_ai %0:intregs, 0127 %5:hvxvr = V6_vL32Ub_ai %1:intregs, 0128 %6:hvxvr = V6_vsub_hf %4:hvxvr, %5:hvxvr129 %7:hvxvr = V6_vconv_hf_qf16 %6:hvxvr130 %8:hvxvr = V6_vsub_hf %7:hvxvr, %5:hvxvr131 %9:hvxvr = V6_vconv_hf_qf16 %8:hvxvr132 V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr133 %10:hvxvr = V6_vsub_hf %7:hvxvr, %9:hvxvr134 %11:hvxvr = V6_vconv_hf_qf16 %10:hvxvr135 V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr136...137# MUL-ENABLED-LABEL: name: qfpMul32138# MUL-ENABLED: V6_vmpy_qf32_sf139# MUL-ENABLED-NEXT: V6_vconv_sf_qf32140# MUL-ENABLED-NEXT: V6_vmpy_qf32_sf141# MUL-ENABLED-NEXT: V6_vconv_sf_qf32142# MUL-ENABLED-NEXT: V6_vmpy_qf32143# MUL-ENABLED-NEXT: V6_vS32Ub_ai144# DEFAULT-LABEL: name: qfpMul32145# DEFAULT: V6_vmpy_qf32_sf146# DEFAULT-NEXT: V6_vconv_sf_qf32147# DEFAULT-NEXT: V6_vmpy_qf32_sf148# DEFAULT-NEXT: V6_vconv_sf_qf32149# DEFAULT-NEXT: V6_vmpy_qf32_sf150# DEFAULT-NEXT: V6_vS32Ub_ai151---152name: qfpMul32153tracksRegLiveness: true154body: |155 bb.0:156 liveins: $r0, $r1, $r2, $r3157 %0:intregs = COPY $r0158 %1:intregs = COPY $r1159 %2:intregs = COPY $r2160 %3:intregs = COPY $r3161 %4:hvxvr = V6_vL32Ub_ai %0:intregs, 0162 %5:hvxvr = V6_vL32Ub_ai %1:intregs, 0163 %6:hvxvr = V6_vL32Ub_ai %2:intregs, 0164 %7:hvxvr = V6_vmpy_qf32_sf %4:hvxvr, %5:hvxvr165 %8:hvxvr = V6_vconv_sf_qf32 %7:hvxvr166 %9:hvxvr = V6_vmpy_qf32_sf %5:hvxvr, %6:hvxvr167 %10:hvxvr = V6_vconv_sf_qf32 %9:hvxvr168 %11:hvxvr = V6_vmpy_qf32_sf %8:hvxvr, %10:hvxvr169 V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr170...171# MUL-ENABLED-LABEL: name: qfpMul16172# MUL-ENABLED: V6_vconv_hf_qf16173# MUL-ENABLED-NEXT: V6_vmpy_qf16_mix_hf174# MUL-ENABLED-NEXT: V6_vconv_hf_qf16175# MUL-ENABLED-NEXT: V6_vS32Ub_ai176# MUL-ENABLED-NEXT: V6_vmpy_qf16177# DEFAULT-LABEL: name: qfpMul16178# DEFAULT: V6_vconv_hf_qf16179# DEFAULT-NEXT: V6_vmpy_qf16_hf180# DEFAULT-NEXT: V6_vconv_hf_qf16181# DEFAULT-NEXT: V6_vS32Ub_ai182# DEFAULT-NEXT: V6_vmpy_qf16_hf183---184name: qfpMul16185tracksRegLiveness: true186body: |187 bb.0:188 liveins: $r0, $r1, $r2, $r3189 %0:intregs = COPY $r0190 %1:intregs = COPY $r1191 %2:intregs = COPY $r2192 %3:intregs = COPY $r3193 %4:hvxvr = V6_vL32Ub_ai %0:intregs, 0194 %5:hvxvr = V6_vL32Ub_ai %1:intregs, 0195 %6:hvxvr = V6_vmpy_qf16_hf %4:hvxvr, %5:hvxvr196 %7:hvxvr = V6_vconv_hf_qf16 %6:hvxvr197 %8:hvxvr = V6_vmpy_qf16_hf %5:hvxvr, %7:hvxvr198 %9:hvxvr = V6_vconv_hf_qf16 %8:hvxvr199 V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr200 %10:hvxvr = V6_vmpy_qf16_hf %7:hvxvr, %9:hvxvr201 %11:hvxvr = V6_vconv_hf_qf16 %10:hvxvr202 V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr203