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1; RUN: llc -mtriple=hexagon -O3 < %s | FileCheck %s2 3; Test that unaligned load is enabled for 128B4; CHECK-NOT: r{{[0-9]+}} = memw5 6; Function Attrs: nounwind7define void @f0(ptr noalias nocapture readonly %a0, ptr nocapture %a1) #0 {8b0:9 %v1 = load <32 x i32>, ptr %a0, align 4, !tbaa !010 %v2 = tail call <32 x i32> @llvm.hexagon.V6.vrmpyub.128B(<32 x i32> %v1, i32 16843009)11 store <32 x i32> %v2, ptr %a1, align 128, !tbaa !012 ret void13}14 15; Function Attrs: nounwind readnone16declare <32 x i32> @llvm.hexagon.V6.vrmpyub.128B(<32 x i32>, i32) #117 18attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" }19attributes #1 = { nounwind readnone }20 21!0 = !{!1, !1, i64 0}22!1 = !{!"omnipotent char", !2, i64 0}23!2 = !{!"Simple C/C++ TBAA"}24