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1; RUN: llc -O2 -mtriple=hexagon < %s | FileCheck %s2 3; Hexagon's vsplatb/vsplath only consider the lower 8/16 bits of the source4; register. Any extension of the source is not necessary.5 6; CHECK-NOT: zxtb7; CHECK-NOT: zxth8 9target triple = "hexagon"10 11; Function Attrs: nounwind readnone12define i64 @f0(i64 %a0) #0 {13b0:14 %v0 = trunc i64 %a0 to i3215 %v1 = and i32 %v0, 6553516 %v2 = tail call i64 @llvm.hexagon.S2.vsplatrh(i32 %v1)17 %v3 = and i32 %v0, 25518 %v4 = tail call i32 @llvm.hexagon.S2.vsplatrb(i32 %v3)19 %v5 = sext i32 %v4 to i6420 %v6 = add nsw i64 %v5, %v221 ret i64 %v622}23 24; Function Attrs: nounwind readnone25declare i64 @llvm.hexagon.S2.vsplatrh(i32) #026 27; Function Attrs: nounwind readnone28declare i32 @llvm.hexagon.S2.vsplatrb(i32) #029 30attributes #0 = { nounwind readnone }31