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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s | FileCheck %s3 4; Test custom lowering for 32-bit integer multiplication.5 6target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"7target triple = "lanai"8 9define i32 @f6(i32 inreg %a) #0 {10; CHECK-LABEL: f6:11; CHECK: ! %bb.0:12; CHECK-NEXT: st %fp, [--%sp]13; CHECK-NEXT: add %sp, 0x8, %fp14; CHECK-NEXT: sub %sp, 0x8, %sp15; CHECK-NEXT: sh %r6, 0x1, %r316; CHECK-NEXT: sh %r6, 0x3, %r917; CHECK-NEXT: sub %r9, %r3, %rv18; CHECK-NEXT: ld -4[%fp], %pc ! return19; CHECK-NEXT: add %fp, 0x0, %sp20; CHECK-NEXT: ld -8[%fp], %fp21 %1 = mul nsw i32 %a, 622 ret i32 %123}24 25define i32 @f7(i32 inreg %a) #0 {26; CHECK-LABEL: f7:27; CHECK: ! %bb.0:28; CHECK-NEXT: st %fp, [--%sp]29; CHECK-NEXT: add %sp, 0x8, %fp30; CHECK-NEXT: sub %sp, 0x8, %sp31; CHECK-NEXT: sh %r6, 0x3, %r332; CHECK-NEXT: sub %r3, %r6, %rv33; CHECK-NEXT: ld -4[%fp], %pc ! return34; CHECK-NEXT: add %fp, 0x0, %sp35; CHECK-NEXT: ld -8[%fp], %fp36 %1 = mul nsw i32 %a, 737 ret i32 %138}39 40define i32 @f8(i32 inreg %a) #0 {41; CHECK-LABEL: f8:42; CHECK: ! %bb.0:43; CHECK-NEXT: st %fp, [--%sp]44; CHECK-NEXT: add %sp, 0x8, %fp45; CHECK-NEXT: sub %sp, 0x8, %sp46; CHECK-NEXT: sh %r6, 0x3, %rv47; CHECK-NEXT: ld -4[%fp], %pc ! return48; CHECK-NEXT: add %fp, 0x0, %sp49; CHECK-NEXT: ld -8[%fp], %fp50 %1 = shl nsw i32 %a, 351 ret i32 %152}53 54define i32 @f9(i32 inreg %a) #0 {55; CHECK-LABEL: f9:56; CHECK: ! %bb.0:57; CHECK-NEXT: st %fp, [--%sp]58; CHECK-NEXT: add %sp, 0x8, %fp59; CHECK-NEXT: sub %sp, 0x8, %sp60; CHECK-NEXT: sh %r6, 0x3, %r361; CHECK-NEXT: add %r3, %r6, %rv62; CHECK-NEXT: ld -4[%fp], %pc ! return63; CHECK-NEXT: add %fp, 0x0, %sp64; CHECK-NEXT: ld -8[%fp], %fp65 %1 = mul nsw i32 %a, 966 ret i32 %167}68 69define i32 @f10(i32 inreg %a) #0 {70; CHECK-LABEL: f10:71; CHECK: ! %bb.0:72; CHECK-NEXT: st %fp, [--%sp]73; CHECK-NEXT: add %sp, 0x8, %fp74; CHECK-NEXT: sub %sp, 0x8, %sp75; CHECK-NEXT: sh %r6, 0x1, %r376; CHECK-NEXT: sh %r6, 0x3, %r977; CHECK-NEXT: add %r9, %r3, %rv78; CHECK-NEXT: ld -4[%fp], %pc ! return79; CHECK-NEXT: add %fp, 0x0, %sp80; CHECK-NEXT: ld -8[%fp], %fp81 %1 = mul nsw i32 %a, 1082 ret i32 %183}84 85define i32 @f1280(i32 inreg %a) #0 {86; CHECK-LABEL: f1280:87; CHECK: ! %bb.0:88; CHECK-NEXT: st %fp, [--%sp]89; CHECK-NEXT: add %sp, 0x8, %fp90; CHECK-NEXT: sub %sp, 0x8, %sp91; CHECK-NEXT: sh %r6, 0x8, %r392; CHECK-NEXT: sh %r6, 0xa, %r993; CHECK-NEXT: add %r9, %r3, %rv94; CHECK-NEXT: ld -4[%fp], %pc ! return95; CHECK-NEXT: add %fp, 0x0, %sp96; CHECK-NEXT: ld -8[%fp], %fp97 %1 = mul nsw i32 %a, 128098 ret i32 %199}100 101define i32 @fm6(i32 inreg %a) #0 {102; CHECK-LABEL: fm6:103; CHECK: ! %bb.0:104; CHECK-NEXT: st %fp, [--%sp]105; CHECK-NEXT: add %sp, 0x8, %fp106; CHECK-NEXT: sub %sp, 0x8, %sp107; CHECK-NEXT: sh %r6, 0x3, %r3108; CHECK-NEXT: sh %r6, 0x1, %r9109; CHECK-NEXT: sub %r9, %r3, %rv110; CHECK-NEXT: ld -4[%fp], %pc ! return111; CHECK-NEXT: add %fp, 0x0, %sp112; CHECK-NEXT: ld -8[%fp], %fp113 %1 = mul nsw i32 %a, -6114 ret i32 %1115}116 117define i32 @fm7(i32 inreg %a) #0 {118; CHECK-LABEL: fm7:119; CHECK: ! %bb.0:120; CHECK-NEXT: st %fp, [--%sp]121; CHECK-NEXT: add %sp, 0x8, %fp122; CHECK-NEXT: sub %sp, 0x8, %sp123; CHECK-NEXT: sh %r6, 0x3, %r3124; CHECK-NEXT: sub %r6, %r3, %rv125; CHECK-NEXT: ld -4[%fp], %pc ! return126; CHECK-NEXT: add %fp, 0x0, %sp127; CHECK-NEXT: ld -8[%fp], %fp128 %1 = mul nsw i32 %a, -7129 ret i32 %1130}131 132define i32 @fm8(i32 inreg %a) #0 {133; CHECK-LABEL: fm8:134; CHECK: ! %bb.0:135; CHECK-NEXT: st %fp, [--%sp]136; CHECK-NEXT: add %sp, 0x8, %fp137; CHECK-NEXT: sub %sp, 0x8, %sp138; CHECK-NEXT: sh %r6, 0x3, %r3139; CHECK-NEXT: sub %r0, %r3, %rv140; CHECK-NEXT: ld -4[%fp], %pc ! return141; CHECK-NEXT: add %fp, 0x0, %sp142; CHECK-NEXT: ld -8[%fp], %fp143 %1 = mul nsw i32 %a, -8144 ret i32 %1145}146 147define i32 @fm9(i32 inreg %a) #0 {148; CHECK-LABEL: fm9:149; CHECK: ! %bb.0:150; CHECK-NEXT: st %fp, [--%sp]151; CHECK-NEXT: add %sp, 0x8, %fp152; CHECK-NEXT: sub %sp, 0x8, %sp153; CHECK-NEXT: sh %r6, 0x3, %r3154; CHECK-NEXT: add %r6, %r3, %r3155; CHECK-NEXT: sub %r0, %r3, %rv156; CHECK-NEXT: ld -4[%fp], %pc ! return157; CHECK-NEXT: add %fp, 0x0, %sp158; CHECK-NEXT: ld -8[%fp], %fp159 %1 = mul nsw i32 %a, -9160 ret i32 %1161}162 163define i32 @fm10(i32 inreg %a) #0 {164; CHECK-LABEL: fm10:165; CHECK: ! %bb.0:166; CHECK-NEXT: st %fp, [--%sp]167; CHECK-NEXT: add %sp, 0x8, %fp168; CHECK-NEXT: sub %sp, 0x8, %sp169; CHECK-NEXT: sh %r6, 0x3, %r3170; CHECK-NEXT: sh %r6, 0x1, %r9171; CHECK-NEXT: add %r9, %r3, %r3172; CHECK-NEXT: sub %r0, %r3, %rv173; CHECK-NEXT: ld -4[%fp], %pc ! return174; CHECK-NEXT: add %fp, 0x0, %sp175; CHECK-NEXT: ld -8[%fp], %fp176 %1 = mul nsw i32 %a, -10177 ret i32 %1178}179 180define i32 @h1(i32 inreg %a) #0 {181; CHECK-LABEL: h1:182; CHECK: ! %bb.0:183; CHECK-NEXT: st %fp, [--%sp]184; CHECK-NEXT: add %sp, 0x8, %fp185; CHECK-NEXT: sub %sp, 0x8, %sp186; CHECK-NEXT: mov 0xaaaa0000, %r3187; CHECK-NEXT: add %pc, 0x10, %rca188; CHECK-NEXT: st %rca, [--%sp]189; CHECK-NEXT: bt __mulsi3190; CHECK-NEXT: or %r3, 0xaaab, %r7191; CHECK-NEXT: ld -4[%fp], %pc ! return192; CHECK-NEXT: add %fp, 0x0, %sp193; CHECK-NEXT: ld -8[%fp], %fp194 %1 = mul i32 %a, -1431655765195 ret i32 %1196}197