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1; RUN: llc < %s -asm-verbose=false | FileCheck %s2 3; Test that basic 32-bit integer operations assemble as expected.4 5target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"6target triple = "lanai"7 8; Function Attrs: nounwind readnone9declare i32 @llvm.ctpop.i32(i32) #110 11; Function Attrs: nounwind readnone12declare i32 @llvm.ctlz.i32(i32, i1) #113 14; Function Attrs: nounwind readnone15declare i32 @llvm.cttz.i32(i32, i1) #116 17; CHECK-LABEL: add32:18; CHECK: add %r{{[0-9]+}}, %r{{[0-9]+}}, %rv19define i32 @add32(i32 %x, i32 %y) {20 %a = add i32 %x, %y21 ret i32 %a22}23 24; CHECK-LABEL: sub32:25; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv26define i32 @sub32(i32 %x, i32 %y) {27 %a = sub i32 %x, %y28 ret i32 %a29}30 31; CHECK-LABEL: mul32:32; CHECK: bt __mulsi333define i32 @mul32(i32 %x, i32 %y) {34 %a = mul i32 %x, %y35 ret i32 %a36}37 38; CHECK-LABEL: sdiv32:39; CHECK: bt __divsi340define i32 @sdiv32(i32 %x, i32 %y) {41 %a = sdiv i32 %x, %y42 ret i32 %a43}44 45; CHECK-LABEL: udiv32:46; CHECK: bt __udivsi347define i32 @udiv32(i32 %x, i32 %y) {48 %a = udiv i32 %x, %y49 ret i32 %a50}51 52; CHECK-LABEL: srem32:53; CHECK: bt __modsi354define i32 @srem32(i32 %x, i32 %y) {55 %a = srem i32 %x, %y56 ret i32 %a57}58 59; CHECK-LABEL: urem32:60; CHECK: bt __umodsi361define i32 @urem32(i32 %x, i32 %y) {62 %a = urem i32 %x, %y63 ret i32 %a64}65 66; CHECK-LABEL: and32:67; CHECK: and %r{{[0-9]+}}, %r{{[0-9]+}}, %rv68define i32 @and32(i32 %x, i32 %y) {69 %a = and i32 %x, %y70 ret i32 %a71}72 73; CHECK-LABEL: or32:74; CHECK: or %r{{[0-9]+}}, %r{{[0-9]+}}, %rv75define i32 @or32(i32 %x, i32 %y) {76 %a = or i32 %x, %y77 ret i32 %a78}79 80; CHECK-LABEL: xor32:81; CHECK: xor %r{{[0-9]+}}, %r{{[0-9]+}}, %rv82define i32 @xor32(i32 %x, i32 %y) {83 %a = xor i32 %x, %y84 ret i32 %a85}86 87; CHECK-LABEL: shl32:88; CHECK: sh %r{{[0-9]+}}, %r{{[0-9]+}}, %rv89define i32 @shl32(i32 %x, i32 %y) {90 %a = shl i32 %x, %y91 ret i32 %a92}93 94; CHECK-LABEL: shr32:95; CHECK: sub %r0, %r{{[0-9]+}}, %r{{[0-9]+}}96; CHECK: sh %r{{[0-9]+}}, %r{{[0-9]+}}, %rv97define i32 @shr32(i32 %x, i32 %y) {98 %a = lshr i32 %x, %y99 ret i32 %a100}101 102; CHECK-LABEL: sar32103; CHECK: sub %r0, %r{{[0-9]+}}, %r{{[0-9]+}}104; CHECK: sha %r{{[0-9]+}}, %r{{[0-9]+}}, %rv105define i32 @sar32(i32 %x, i32 %y) {106 %a = ashr i32 %x, %y107 ret i32 %a108}109 110; CHECK-LABEL: clz32:111; CHECK: leadz %r{{[0-9]+}}, %rv112define i32 @clz32(i32 %x) {113 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)114 ret i32 %a115}116 117; CHECK-LABEL: clz32_zero_undef:118; CHECK-NOT: sub.f119; CHECK: leadz %r{{[0-9]+}}, %rv120define i32 @clz32_zero_undef(i32 %x) {121 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)122 ret i32 %a123}124 125; CHECK-LABEL: ctz32:126; CHECK: trailz %r{{[0-9]+}}, %rv127define i32 @ctz32(i32 %x) {128 %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)129 ret i32 %a130}131 132; CHECK-LABEL: ctz32_zero_undef:133; CHECK-NOT: sub.f134; CHECK: trailz %r{{[0-9]+}}, %rv135define i32 @ctz32_zero_undef(i32 %x) {136 %a = call i32 @llvm.cttz.i32(i32 %x, i1 true)137 ret i32 %a138}139 140; CHECK-LABEL: popcnt32:141; CHECK: popc %r{{[0-9]+}}, %rv142define i32 @popcnt32(i32 %x) {143 %a = call i32 @llvm.ctpop.i32(i32 %x)144 ret i32 %a145}146